參數(shù)資料
型號(hào): ISL6556ACR
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PQCC32
封裝: 5 X 5 MM, PLASTIC, MO-220VHHD-2, QFN-32
文件頁(yè)數(shù): 19/24頁(yè)
文件大?。?/td> 702K
代理商: ISL6556ACR
19
In Equation 18, make sure that
T
2
is the desired
temperature rise above the ambient temperature, and
T
1
is
the measured temperature rise above the ambient
temperature. While a single adjustment according to Equation
18 is usually sufficient, it may occasionally be necessary to
adjust R
ISEN
two or more times to achieve optimal thermal
balance between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R
FB
in Figure 5.
Its value depends on the desired full-load droop voltage
(V
DROOP
in Figure 5). If Equation 17 is used to select each
ISEN resistor, the load-line regulation resistor is as shown
in Equation 19.
If one or more of the ISEN resistors is adjusted for thermal
balance, as in Equation 18, the load-line regulation resistor
should be selected according to Equation 20 where I
FL
is the
full-load operating current and R
ISEN(n)
is the ISEN resistor
connected to the n
th
ISEN pin.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in
Load-Line Regulation
.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
C
and C
C
.
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
FB
, has already been chosen as
outlined in
Load-Line Regulation Resistor
. Select a target
bandwidth for the compensated system, f
0
. The target
bandwidth must be large enough to assure adequate
transient performance, but smaller than 1/3 of the per-
channel switching frequency. The values of the
compensation components depend on the relationships of f
0
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
In Equations 21, L is the per-channel filter inductance
divided by the number of active channels; C is the sum total
of all output capacitors; ESR is the equivalent-series
resistance of the bulk output-filter capacitance; and V
PP
is
the peak-to-peak sawtooth signal amplitude as described in
Figure 4 and
Electrical Specifications
.
R
FB
V
70
10
6
×
------------------------
=
(EQ. 19)
R
FB
V
I
FL
r
DS ON
)
--------------------------------
R
ISEN n
( )
n
=
(EQ. 20)
FIGURE 12. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6556A CIRCUIT
I
COMP
C
C
R
C
R
FB
FB
IOUT
VDIFF
-
+
V
DROOP
C
2
(OPTIONAL)
2
π
LC
-------1
f
0
>
R
C
R
FB
2
π
f
V
LC
IN
0.75V
π
V
PP
R
FB
f
0
-------0.75V
=
C
C
2
=
Case 1:
2
π
LC
--------1
f
0
π
C ESR
)
2
<
R
C
R
FB
V
2
π
0.75 V
IN
0.75V
)
f
V
PP
R
FB
LC
2
0
2
LC
-----------------------------f
=
C
C
2
π
(
------------------------------------------------------------
=
Case 2:
(EQ. 21)
f
0
π
C ESR
)
2
>
R
C
R
FB
2
π
f
V
L
IN
ESR
(
)
0.75 V
=
C
C
0.75V
ESR
2
π
V
PP
R
FB
f
0
L
-------------------------------------------- C
=
Case 3:
ISL6556A
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