參數(shù)資料
型號(hào)： ISL6566A
廠(chǎng)商： Intersil Corporation
英文描述： Three-Phase Buck PWM Controller with Two Integrated MOSFET Drivers and One External Driver Signal
中文描述： 三相降壓PWM控制器，帶有兩個(gè)集成MOSFET驅(qū)動(dòng)器和一個(gè)外部驅(qū)動(dòng)器的信號(hào)
文件頁(yè)數(shù)： 14/28頁(yè)
文件大小： 784K
代理商： ISL6566A
14
FN9200.2
July 27, 2005
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V
DROOP
, can be shown to be proportional to the channel
currents I
L1
, I
L2
, and I
L3
, shown in Equation 6.
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V
DROOP
is equal to the sum of the voltage
drops across the individual DCRs, multiplied by a gain. As
Equation 7 shows, V
DROOP
is therefore proportional to the
total output current, I
OUT
.
By simply adjusting the value of R
S
, the load line can be set
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R
COMP
to compensate for the rise in DCR due to
temperature.
Note:
An optional 10nF ceramic capacitor from the ISUM pin
to the IREF pin is recommended to help reduce any noise
affects on the current sense amplifier due to layout.
Output-Voltage Offset Programming
The ISL6566A allows the designer to accurately adjust the
offset voltage by connecting a resistor, R
OFS
, from the OFS
pin to VCC or GND. When R
OFS
is connected between OFS
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (I
OFS
) to flow into the OFS pin
and out of the FB pin. If R
OFS
is connected to ground, the
voltage across it is regulated to 0.5V, and I
OFS
flows into the
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (I
OFS
x
R
FB
). These functions are shown in Figures 8 and 9.
VDROOPs
( )
-------------
1
+
1
+
)
-------------------------------------------------------------------------
-----------------------
IL1
IL2
IL3
+
+
(
)
DCR
=
(EQ. 6)
V
DROOP
R
S
--------------------
I
OUT
DCR
=
(EQ. 7)
FIGURE 7. DCR SENSING CONFIGURATION
-
+
ICOMP
R
S
DCR
L
INDUCTOR
3
V
OUT
C
OUT
-
+V
L
(s)
DCR
L
INDUCTOR
IL
2
DCR
L
INDUCTOR
IL
1
PHASE3
PHASE2
PHASE1
R
S
R
S
R
COMP
C
COMP
ISUM
IREF
ISL6566A
-
+
V
DROOP
I
OUT
(optional)
To External Driver
PHASE Pin
E/A
FB
OFS
VCC
GND
+
-
+
-
0.5V
1.5V
GND
R
OFS
R
FB
VDIFF
ISL6566A
FIGURE 8. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
VREF
V
OFS
-
+
I
OFS
ISL6566A
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