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參數(shù)資料
| 型號： | ISL6580CR |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Integrated Power Stage |
| 中文描述： | 35 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PQCC56 |
| 封裝： | 8 X 8 MM, PLASTIC, QFN-56 |
| 文件頁數(shù)： | 17/31頁 |
| 文件大?。?/td> | 1391K |
| 代理商： | ISL6580CR |
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transient response by momentarily increasing the maximum
current slew rate.
How ATR Is Enabled and Disabled
ATR is defined using the load line and its specification of DC
and transient voltage limits. A sample is shown in Figure 23.
The “maximum” V
OUT
value at no load is commonly the VID.
The “maximum” and “minimum” envelopes around “typical”
are commonly symmetrical.
One ISL6580 is dedicated to ATR sensing. It maintains an
internal reference voltage that is fixed at the midpoint of the
“typical” load line excursion (see Figure 23). This reference
voltage is labeled PVID. Then independent transient voltage
thresholds are defined via the user interface software
relative to PVID. The ATRL threshold defines the highest
transient overshoot; the ATRH threshold defines the lowest
transient undershoot.
If the output voltage rises above the ATRL threshold, then
the dedicated ISL6580 sends an ATRL pulse. When the
output voltage returns below the ATRL threshold, the ATRL
pulse is ended. Similarly, if the output voltage drops below
the ATRH threshold, then the dedicated ISL6580 sends an
ATRH pulse. The ATRH pulse is ended when the output
voltage returns above the ATRH threshold.
When an ATRL or ATRH pulse is received by the ISL6590,
two mutually exclusive ATR modes are possible. If an ATRL
pulse is received first then ATRL reaction is enabled and
ATRH pulses are ignored. Conversely, if an ATRH pulse is
received first then ATRH reaction is enabled and ATRL
pulses are ignored.
After entering either ATR mode, if neither an ATRL nor an
ATRH pulse is received for a short time (<100ns), then ATR
mode is exited. Ordinary closed-loop response is resumed.
What ATR Does
Switching of the ISL6580’s by the ISL6590 is typically
performed using synchronous complementary PFET and
NFET control signals. This push-pull alternation alone
cannot provide a rapid response to fast load transitions.
When either ATR mode is enabled, fast asynchronous
control signals are generated. Furthermore, ATR
suppresses the alternating push-pull switching to improve
the transient response. The final control signals (named
NDRIVE and PWM) sent by the ISL6590 are the
combination of these synchronous and asynchronous
sources. Three permutations result:
1. If ATR is not engaged, then
NDRIVE = NFET
(synchronous)
PWM = PFET
(synchronous)
2. If ATRL mode is engaged, then
NDRIVE = NFET
(sync)
+ ATRL
(async)
PWM
= off
3. If ATRH mode is engaged, then
NDRIVE
= off
PWM = PFET
(sync)
+ ATRH
(async)
Figure 24 illustrates both ATR modes. Two successive
phases are shown in a hypothetical
n
-phase system.
In the first sequence shown, ATRL is received before ATRH.
This forces off all PWM signals. The NDRIVE signals are the
combination of NFET and ATRL. The asynchronous ATRL is
applied simultaneously to the NDRIVE signal of all phases.
Note that the ordinary synchronous NFET signals have a
long on-time. Therefore, many of the asynchronous ATRL
signals are hidden by the synchronous NFET signals.
Hidden ATRL signals are colored gray in Figure 24.
In the second sequence shown, ATRH is received before
ATRL. This forces off all NDRIVE signals. The PWM signals
are the combination of PFET and ATRH. As above, the
asynchronous ATRH is applied simultaneously to the PWM
signal of all phases. Note that, unlike NFET, the ordinary
synchronous PFET signals have a short on-time. Therefore,
most of the asynchronous ATRH signals are not hidden by
the synchronous PFET signals. Hidden ATRH signals are
also colored gray in Figure 24.
Between the two sequences, ATR mode is disabled because
ATRL and ATRH signals are absent.
FIGURE 22. ILLUSTRATION OF ATR AND NON-ATR PHASE
AND TOTAL CURRENT
I
min
(= 0 A)
I
max
VID
I
load
V
out
ATRL threshold
ATRH threshold
(PVID)
Reference
FIGURE 23. BASIC ATR THRESHOLD DEFINITIONS
ISL6580
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