參數(shù)資料
型號(hào): ISP1160BD/01,151
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 8/88頁
文件大小: 394K
代理商: ISP1160BD/01,151
Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 05 — 24 December 2004
16 of 88
9397 750 13963
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
To re-enable the interrupt generation:
1. Set all bits in the Hc
PInterrupt register.
2. Set the InterruptPinEnable bit to logic 1.
Remark: The InterruptPinEnable bit in the HcHardwareConguration register latches
the interrupt output. When this bit is set to logic 0, the interrupt output will remain
unchanged, regardless of any operations on the interrupt control registers.
If INT1 is asserted, and the Host Controller Driver (HCD) wishes to temporarily mask
off the INT signal without clearing the Hc
PInterrupt register, the following procedure
should be followed:
1. Make sure that the InterruptPinEnable bit is set to logic 1.
2. Clear all bits in the Hc
PInterruptEnable register.
3. Set the InterruptPinEnable bit to logic 0.
To re-enable the interrupt generation:
1. Set all bits in the Hc
PInterruptEnable register according to the HCD
requirements.
2. Set the InterruptPinEnable bit to logic 1.
9.
Host Controller (HC)
9.1 HC’s four USB states
The ISP1160’s USB HC has four USB states—USBOperational, USBReset,
USBSuspend and USBResume—that dene the HC’s USB signalling and bus states
responsibilities. The signals are visible to the Host Controller Driver (HCD) via the
ISP1160 USB HC’s control registers.
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