參數(shù)資料
型號(hào): ISP1181
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件)
中文描述: 全速通用串行總線接口設(shè)備(全速通用串行總線接口器件)
文件頁數(shù): 54/69頁
文件大?。?/td> 1655K
代理商: ISP1181
Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
54 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
19.4 DMA timing: single-cycle mode
(1) Example: read data.
Fig 26. Write data + write command cycle timing.
handbook, full pagewidth
MGT025
Tcy(WD-WC)
data
DATA
WR
data
command
RD
CS
(1)
Fig 27. Write command + read data cycle timing.
handbook, full pagewidth
MGT023
Tcy(WC-RD)
Tcy(RD-RD)
command
DATA
WR
data
data
RD
CS
(1) Example: read data.
Fig 28. Read data + write command cycle timing.
handbook, full pagewidth
MGT024
Tcy(RD-WC)
data
DATA
WR
data
(1)
command
RD
CS
Table 61: Dynamic characteristics: single-cycle DMA timing
Symbol
Parameter
Conditions
8-bit bus
16-bit bus
Unit
Min
Max
Min
Max
8237 compatible mode (see
Figure 29
)
t
ASRP
DREQ off after DACK on
t
APRS
DREQ on after DACK off
-
-
40
22
-
-
40
22
ns
ns
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