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參數(shù)資料
| 型號(hào)： | ISP1181DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | INDUCTOR 4.7NH +-.3NH 0402 SMD |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, TSSOP-48 |
| 文件頁數(shù)： | 22/69頁 |
| 文件大?。?/td> | 1655K |
| 代理商： | ISP1181DGG |
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Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
22 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
11.2 Resume conditions
For both application modes (powered-on and powered-off) wake-up from ‘suspend’
state is initiated either by the USB host or by the application:
USB host
: drives a K-state on the USB bus (global resume)
Application
: remote wake-up via a HIGH level on input WAKEUP or a LOW level
on input CS (if enabled via bit WKUPCS in the Hardware Configuration Register).
The steps of a wake-up sequence are as follows:
1. The internal oscillator and the PLL multiplier are re-enabled. When stabilized, the
clock signals are routed to all internal circuits of the ISP1181.
2. The SUSPEND output is de-asserted and the RESUME bit in the Interrupt
Register is set. This will generate an interrupt if bit IERESUME in the Interrupt
Enable Register is set.
3. Maximum 15 ms after starting the wake-up sequence the ISP1181 resumes its
normal functionality.
4. In case of a remote wake-up ISP1181 drives a K-state on the USB bus for 10 ms.
5. Following the de-assertion of output SUSPEND, the application restores itself
and other system components to normal operating mode.
6. After wake-up the internal registers of ISP1181 are write-protected to prevent
corruption by inadvertent writing during power-up of external components. The
firmware must send an Unlock Device command to the ISP1181 to restore its full
functionality. See
Section 12.3.2
for more details.
11.3 Control bits in suspend and resume
Table 14: Summary of control bits
Register
Interrupt
Bit
SUSPND
Function
a transition from ‘a(chǎn)wake’ to ‘suspend’ state was
detected
monitors USB bus status (logic 1 = suspend);
used when interrupt is serviced
enables output INT to signal ‘suspend’ state
enables SoftConnect pull-up resistor to USB bus
a HIGH-to-LOW transition enables ‘suspend’
state
a HIGH-to-LOW transition enables sending a
10 ms resume signal (K-state)
selects internal (SoftConnect) or external pull-up
resistor
enables wake-up on LOW level of input CS
selects powered-off mode during ‘suspend’ state
sending data AA37H unlocks the internal
registers for writing after a ‘resume’
BUSTATUS
Interrupt Enable
Mode
IESUSP
SOFTCT
GOSUSP
SNDRSU
Hardware
Configuration
EXTPUL
WKUPCS
PWROFF
all
Unlock
相關(guān)PDF資料 |
PDF描述 |
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| ISP1183 | Low-power Universal Serial Bus interface device with DMA |
| ISP1183BS | Low-power Universal Serial Bus interface device with DMA |
| ISP1301 | Universal Serial Bus On-The-Go transceiver |
| ISP1301BS | Universal Serial Bus On-The-Go transceiver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1183 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-power Universal Serial Bus interface device with DMA |
| ISP1183BS | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS,118 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,151 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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