參數(shù)資料
型號(hào): ISP1362BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 64/150頁
文件大?。?/td> 647K
代理商: ISP1362BD
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
64 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 26:
Bit
Symbol
OtgInterrupt register: bit allocation
15
14
13
12
11
10
9
8
reserved
OTG_TMR
_TIMEOUT
0
R/W
2
B_SESS_
END_C
0
R/W
B_SE0_
SRP
0
R/W
1
A_VBUS_
VLD_C
0
R/W
A_SRP_
DET
0
R/W
0
ID_REG_C
Reset
Access
Bit
Symbol
-
-
7
-
-
6
-
-
5
-
-
4
-
-
3
OTG_
RESUME
0
R/W
OTG_
SUSPND
0
R/W
RMT_
CONN_C
0
R/W
B_SESS_
VLD_C
0
R/W
A_SESS_
VLD_C
0
R/W
Reset
Access
0
R/W
Table 27:
Bit
15 to 11
10
OtgInterrupt register: bit description
Symbol
Description
-
reserved
OTG_TMR_
TIMEOUT
logic 1 clears this bit. Writing logic 0 has no effect.
This bit is set whenever the OTG timer attains time-out. Writing
0
no event
1
OTG Timer time-out
This bit is set whenever the device detects more than 2 ms of SE0.
Writing logic 1 clears this bit. Writing logic 0 has no effect.
9
B_SE0_
SRP
0
no event
1
bus has been in SE0 for more than 2 ms
This bit is used to detect the session request event (SRP) from the
remote device. The SRP event can be either V
BUS
pulsing or data
line pulsing. Bit 9 (A_SEL_SRP) of the OtgControl register
determines which SRP is selected. Writing logic 1 clears this bit.
Writing logic 0 has no effect.
8
A_SRP_
DET
0
no event
1
SRP is detected
This bit is used to detect a J to K state change when the device is
in the
suspend
state. Writing logic 1 clears this bit. Writing logic 0
has no effect.
7
OTG_
RESUME
0
no event
1
a resume signal (J
K) is detected when the bus is in the
suspend
state
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