2CMOS Memory Write/Erase Characteristics Perf" />
參數(shù)資料
型號: ISPPAC-CLK5304S-01T48C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 53/56頁
文件大?。?/td> 0K
描述: IC BUFFER FANOUT ISP UNIV 48TQFP
標準包裝: 250
系列: ispClock™
類型: 時鐘發(fā)生器,扇出配送,零延遲緩沖器
PLL: 帶旁路
輸入: HSTL,LVCMOS,LVDS,LVPECL,LVTTL,SSTL
輸出: eHSTL,HSTL,LVCMOS,LVTTL,SSTL
電路數(shù): 1
比率 - 輸入:輸出: 2:4
差分 - 輸入:輸出: 是/無
頻率 - 最大: 267MHz
除法器/乘法器: 是/無
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-TQFP(7x7)
包裝: 托盤
Lattice Semiconductor
ispClock5300S Family Data Sheet
6
E
2CMOS Memory Write/Erase Characteristics
Performance Characteristics – Power Supply
DC Electrical Characteristics – Single-Ended Logic
DC Electrical Characteristics – LVDS
DC Electrical Characteristics – Differential LVPECL
Parameter
Conditions
Min.
Typ.
Max.
Units
Erase/Reprogram Cycles
1000
Symbol
Parameter
Conditions
Typ.
Max.
Units
ICCD
Core Supply Current
2
fVCO = 400MHz Feedback Output Active
110
150
mA
ICCDADDER
Incremental ICCD per Active
Output
fOUT = 267MHz
1.5
mA
ICCA
Analog Supply Current
2
fVCO = 400MHz
5.5
7
mA
ICCO
Output Driver Supply Current
(per Bank)
VCCO = 1.8V
1, LVCMOS, fOUT = 267MHz
16
20
mA
VCCO = 2.5V
1, LVCMOS, fOUT = 267MHz
21
27
mA
VCCO = 3.3V
1, LVCMOS, fOUT = 267MHz
27
35
mA
ICCJ
JTAG I/O Supply Current (static)
VCCJ = 1.8V
300
A
VCCJ = 2.5V
400
A
VCCJ = 3.3V
400
A
1. Supply current consumed by each bank, both outputs active, 5pF load.
2.All unused REFCLK and feedbacks connected to ground.
Logic Standard
VIL (V)
VIH (V)
VOL Max. (V) VOH Min. (V)
IOL (mA)
IOH (mA)
Min.
Max.
Min.
Max.
LVTTL/LVCMOS 3.3V
-0.3
0.8
2
3.6
0.4
VCCO - 0.4
12
3
-12
3
LVCMOS 1.8V
-0.3
0.68
1.07
3.6
0.4
VCCO - 0.4
12
3
-12
3
LVCMOS 2.5V
-0.3
0.7
1.7
3.6
0.4
VCCO - 0.4
12
3
-12
3
SSTL2 Class 1
-0.3
VREF - 0.18 VREF + 0.18
3.6
0.54
1
VCCO - 0.81
1
7.6
-7.6
SSTL3 Class 1
-0.3
VREF - 0.2 VREF + 0.2
3.6
0.9
1
VCCO - 1.3
1
8-8
HSTL Class 1
-0.3
VREF - 0.1 VREF + 0.1
3.6
0.4
2
VCCO - 0.4
2
8-8
eHSTL Class 1
-0.3
VREF - 0.1 VREF + 0.1
3.6
0.4
2
VCCO - 0.4
2
8-8
1. Specied for 40Ω internal series output termination.
2. Specied for ≈20Ω internal series output termination, fast slew rate setting.
3. For slower slew rate setting, IOH, IOL should be limited to 8mA.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
VICM
Common Mode Input Voltage
VTHD/2
2.325
V
VTHD
Differential Input Threshold
VICM ≤ 2V
±100
mV
2V < VICM < 2.325V
±150
mV
VIN
Input Voltage
0
2.4
V
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
VIH
Input Voltage High
VCCD = 3.0 to 3.6V
VCCD - 1.17
VCCD - 0.88
V
VCCD = 3.3V
2.14
2.42
VIL
Input Voltage Low
VCCD = 3.0 to 3.6V
VCCD - 1.81
VCCD - 1.48
V
VCCD = 3.3V
1.49
1.83
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