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參數(shù)資料
| 型號： | K4F640412C-JC450 |
| 元件分類： | DRAM |
| 英文描述： | 16M X 4 FAST PAGE DRAM, 45 ns, PDSO32 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-32 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 367K |
| 代理商： | K4F640412C-JC450 |
CMOS DRAM
K4F660412C,K4F640412C
CAPACITANCE (TA=25
°C, VCC=3.3V, f=1MHz)
Parameter
Symbol
Min
Max
Units
Input capacitance [A0 ~ A12]
CIN1
-
5
pF
Input capacitance [RAS, CAS, W, OE]
CIN2
-
7
pF
Output capacitance [DQ0 - DQ3]
CDQ
-
7
pF
Test condition : VCC=3.3V
±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-45
-50
-60
Units
Note
Min
Max
Min
Max
Min
Max
Random read or write cycle time
tRC
80
90
110
ns
Read-modify-write cycle time
tRWC
115
133
153
ns
Access time from RAS
tRAC
45
50
60
ns
3,4,10
Access time from CAS
tCAC
12
13
15
ns
3,4,5
Access time from column address
tAA
23
25
30
ns
3,10
CAS to output in Low-Z
tCLZ
0
ns
3
Output buffer turn-off delay
tOFF
0
13
0
13
0
13
ns
6
Transition time (rise and fall)
tT
1
50
1
50
1
50
ns
2
RAS precharge time
tRP
25
30
40
ns
RAS pulse width
tRAS
45
10K
50
10K
60
10K
ns
RAS hold time
tRSH
12
13
15
ns
CAS hold time
tCSH
45
50
60
ns
CAS pulse width
tCAS
12
10K
13
10K
15
10K
ns
RAS to CAS delay time
tRCD
18
33
20
37
20
45
ns
4
RAS to column address delay time
tRAD
13
22
15
25
15
30
ns
10
CAS to RAS precharge time
tCRP
5
ns
Row address set-up time
tASR
0
ns
Row address hold time
tRAH
8
10
ns
Column address set-up time
tASC
0
ns
Column address hold time
tCAH
8
10
ns
Column address to RAS lead time
tRAL
23
25
30
ns
Read command set-up time
tRCS
0
ns
Read command hold time referenced to CAS
tRCH
0
ns
8
Read command hold time referenced to RAS
tRRH
0
ns
8
Write command hold time
tWCH
8
10
ns
Write command pulse width
tWP
8
10
ns
Write command to RAS lead time
tRWL
13
15
ns
Write command to CAS lead time
tCWL
12
13
15
ns
Data set-up time
tDS
0
ns
9
Data hold time
tDH
10
ns
9
AC CHARACTERISTICS (0
°C≤TA≤70°C, See note 2)
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