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參數(shù)資料
| 型號(hào)： | K7N163645A-Q(F)C(I)13 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18 Pipelined NtRAM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大小： | 279K |
| 代理商： | K7N163645A-Q(F)C(I)13 |
512Kx36 & 1Mx18 Pipelined N
t
RAM
TM
- 3 -
Rev 3.0
Nov. 2003
K7N161801A
K7N163601A
512Kx36 & 1Mx18-Bit Pipelined N
t
RAM
TM
The K7N163601A and K7N161801A are 18,874,368-bits Syn-
chronous Static SRAMs.
The N
t
RAM
TM
, or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except output
enable and linear burst order are synchronized to input clock.
Burst order control must be tied "High or Low".
Asynchronous inputs include the sleep mode enable(ZZ).
Output Enable controls the outputs at any given time.
Write cycles are internally self-timed and initiated by the rising
edge of the clock input. This feature eliminates complex off-chip
write pulse generation
and provides increased timing flexibility for incoming signals.
For read cycles, pipelined SRAM output data is temporarily
stored by an edge triggered output register and then released
to the output buffers at the next rising edge of clock.
The K7N163601A and K7N161801A are implemented with
SAMSUNG
′
s high performance CMOS technology and is avail-
able in 100pin TQFP and 165FBGA packages. Multiple power
and ground pins minimize ground bounce.
GENERAL DESCRIPTION
FEATURES
3.3V+0.165V/-0.165V Power Supply.
I/O Supply Voltage 3.3V+0.165V/-0.165V for 3.3V I/O
or 2.5V+0.4V/-0.125V for 2.5V I/O.
Byte Writable Function.
Enable clock and suspend operation.
Single READ/WRITE control pin.
Self-Timed Write Cycle.
Three Chip Enable for simple depth expansion with no data-
contention .
A interleaved burst or a linear burst mode.
Asynchronous output enable control.
Power Down mode.
100-TQFP-1420A
165FBGA(11x15 ball aray) with body size of 13mmx15mm.
Operating in commeical and industrial temperature range.
LOGIC BLOCK DIAGRAM
FAST ACCESS TIMES
PARAMETER
Symbol
-25
-20
-16
-13
Unit
Cycle Time
tCYC
4.0
5.0
6.0
7.5
ns
Clock Access Time
tCD
2.6
3.2
3.5
4.2
ns
Output Enable Access Time
tOE
2.6
3.2
3.5
4.2
ns
WE
BW
x
(x=a,b,c,d or a,b)
CLK
CKE
CS
1
CS
2
CS
2
ADV
OE
ZZ
DQa
0
~ DQd
7
or
DQa
0
~ DQb
8
DQPa ~ DQPd
ADDRESS
REGISTER
ADDRESS
REGISTER
C
L
A
′
0
~A
′
1
36 or 18
OUTPUT
REGISTER
BUFFER
DATA-IN
REGISTER
DATA-IN
REGISTER
K
K
K
BURST
ADDRESS
COUNTER
WRITE
ADDRESS
REGISTER
WRITE
CONTROL
LOGIC
C
R
K
A [0:18]or
A [0:19]
LBO
A
2
~A
18
or
A
2
~A
19
A
0
~A
1
512Kx36, 1Mx18
MEMORY
ARRAY
N
t
RAM
TM
and No Turnaround Random Access Memory are trademarks of Samsung.
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| K7N163645A-Q(F)C(I)16 | 512Kx36 & 1Mx18 Pipelined NtRAM |
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| K7N163645A-Q(F)C(I)25 | 512Kx36 & 1Mx18 Pipelined NtRAM |
| K7N163601 | 512Kx36 & 1Mx18 Pipelined NtRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7N163645A-QFCI25/20/16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 Pipelined NtRAM |
| K7N163645-FC13 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18-Bit Flow Through NtRAM |
| K7N163645-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18-Bit Flow Through NtRAM |
| K7N163645-FC20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18-Bit Flow Through NtRAM |
| K7N163645-FC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18-Bit Flow Through NtRAM |
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