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參數(shù)資料
| 型號(hào)： | K7N321845M-QC25 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1Mx36 & 2Mx18 Flow-Through NtRAM |
| 中文描述： | 1Mx36 |
| 文件頁(yè)數(shù)： | 7/18頁(yè) |
| 文件大小： | 211K |
| 代理商： | K7N321845M-QC25 |
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1Mx36 & 2Mx18 Flow-Through N
t
RAM
TM
- 7 -
Rev 2.0
Nov. 2003
K7M321825M
K7M323625M
STATE DIAGRAM FOR N
t
RAM
TM
BEGIN
WRITE
BURST
WRITE
BEGIN
READ
WRITE
DS
READ
DS
BURST
READ
WRITE
DS
READ
DS
READ
D
WRTE
B
DESELECT
B
R
B
W
READ
WRITE
BURST
BURST
Notes :
1. An IGNORE CLOCK EDGE cycle is not shown is the above diagram. This is because CKE HIGH only blocks the clock(CLK) input and does
not change the state of the device.
2. States change on the rising edge of the clock(CLK)
COMMAND
ACTION
DS
DESELECT
READ
BEGIN READ
WRITE
BEGIN WRITE
BURST
BEGIN READ
BEGIN WRITE
CONTINUE DESELECT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K7N323601M-QC20 | 1Mx36 & 2Mx18 Flow-Through NtRAM |
| K7N323601M-QC25 | 1Mx36 & 2Mx18 Flow-Through NtRAM |
| K7N323645M-QC20 | 1Mx36 & 2Mx18 Flow-Through NtRAM |
| K7N323645M-QC25 | 1Mx36 & 2Mx18 Flow-Through NtRAM |
| K7M321825M | 1Mx36 & 2Mx18 Flow-Through NtRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7N323601C-FC16000 | 制造商:Samsung Semiconductor 功能描述:32M 32MSYNC SYNC PIPELINED BURST + NT X36 FBGA - Trays |
| K7N323601C-QC16000 | 制造商:Samsung Semiconductor 功能描述:32M 32MSYNC SYNC PIPELINED BURST + NT X36 LQFP - Trays |
| K7N323601C-QC20000 | 制造商:Samsung Semiconductor 功能描述:32M 32MSYNC SYNC PIPELINED BURST + NT X36 LQFP - Trays |
| K7N323601M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18-Bit Pipelined NtRAM |
| K7N323601M-FC13 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 Pipelined NtRAM |
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