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參數(shù)資料
| 型號(hào)： | K7R161884B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18 QDR II b4 SRAM |
| 中文描述： | 512Kx36 |
| 文件頁(yè)數(shù)： | 5/18頁(yè) |
| 文件大?。?/td> | 418K |
| 代理商： | K7R161884B |
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- 13 -
Rev 3.1
July. 2004
512Kx36 & 1Mx18 QDRTM II b4 SRAM
K7R163684B
K7R161884B
tKLKH
tKHKH
tKHKL
tAVKH tKHAX
A1
A2
tIVKH tKHIX
Q1-1
Q1-2
Q1-3
Q1-4
Q2-3
tCHQX1
tKHCH
tCHQV
tCHQX
tCQHQV
tCQHQX
tCHCQX
tCHCQV
tCHQV
tCHCQX
tCHCQV
tKLKH
tKHKH
tKHKL
tKHKH
Note: 1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0.
2. Outputs are disabled one cycle after a NOP.
K
SA
R
K
Q
C
TIMING WAVE FORMS OF READ AND NOP
Don
′t Care
Undefined
CQ
Q2-1
Q2-2
D1-1
D1-2
D1-3
D1-4
K
SA
W
K
D(Data In)
TIMING WAVE FORMS OF WRITE AND NOP
D2-1
D2-2
tDVKH
tKHDX
Don
′t Care
Undefined
Note: 1. D1-1 refers to input to address A1+0, D1-2 refers to input to address A1+1, i.e the next internal burst address following A1+0.
2. BWx ( NWx ) assumed active.
tKLKH
tKHKH
tKHKL
tAVKH tKHAX
A1
A2
tIVKH tKHIX
D2-3
D2-4
tKHIX
(Data Out)
Q2-4
tCHQZ
READ
NOP
READ
WRITE
NOP
WRITE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K7R163684B | 512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R323682 | 1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM |
| K971 | 85.05 mm2, COPPER ALLOY, TIN FINISH, RING TERMINAL |
| K972 | 85.05 mm2, COPPER ALLOY, TIN FINISH, RING TERMINAL |
| K973 | 85.05 mm2, COPPER ALLOY, TIN FINISH, RING TERMINAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7R161884B-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R161884B-FC20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R161884B-FC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R161884B-FC30 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 QDR II b4 SRAM |
| K7R163682B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM |
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