參數(shù)資料
型號(hào)： K9F1208D0A-Y
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： TV 128C 128#22D PIN RECP
中文描述： 6400 × 8位，32 × 16位NAND閃存
文件頁數(shù)： 35/46頁
文件大?。?/td> 748K
代理商： K9F1208D0A-Y
FLASH MEMORY
35
K9F1208D0A
K9F1208U0A
K9F1216D0A
K9F1216U0A
Figure 10. Sequential Row Read2 Operation
(only for
K9F1208U0A-Y,P,V,F or K9F1208D0A-Y,P
valid within a block)
PAGE PROGRAM
The device is programmed basically on a page basis, but it does allow multiple partial page programing of a byte or consecutive bytes
up to 528 bytes(x8 device) or 264words(x16 device), in a single page program cycle. The number of consecutive partial page pro-
gramming operation within the same page without an intervening erase operation must not exceed 1 for main array and 2 for spare
array. The addressing may be done in any random order in a block. A page program cycle consists of a serial data loading period in
which up to 528 bytes(x8 device) or 264words(x16 device) of data may be loaded into the page register, followed by a non-volatile
programming period where the loaded data is programmed into the appropriate cell. Serial data loading can be started from 2nd half
array by moving pointer. About the pointer operation, please refer to the attached technical notes.
The serial data loading period begins by inputting the Serial Data Input command(80h), followed by the four cycle address input and
then serial data loading. The bytes other than those to be programmed do not need to be loaded.The Page Program confirm com-
mand(10h) initiates the programming process. Writing 10h alone without previously entering the serial data will not initiate the pro-
gramming process. The internal write state control automatically executes the algorithms and timings necessary for program and
verify, thereby freeing the system controller for other tasks. Once the program process starts, the Read Status Register command
may be entered, with RE and CE low, to read the status register. The system controller can detect the completion of a program cycle
by monitoring the R/B output, or the Status bit(I/O 6) of the Status Register. Only the Read Status command and Reset command are
valid while programming is in progress. When the Page Program is complete, the Write Status Bit(I/O 0) may be checked(Figure 11).
The internal write verify detects only errors for "1"s that are not successfully programmed to "0"s. The command register remains in
Read Status command mode until another valid command is written to the command register.
50h
A
0
~ A
3
& A
9
~ A
25
I/O
X
R/B
Start Add.(4Cycle)
Data Output
Data Output
Data Output
2nd
Nth
(16Byte)
(16Byte)
1st
Figure 11. Program & Read Status Operation
80h
A
0
~ A
7
& A
9
~ A
25
528 Byte Data
I/O
0
~
7
R/B
Address & Data Input
I/O
0
Pass
10h
70h
Fail
t
R
t
R
t
R
t
PROG
≈
Data Field
Spare Field
1st
Block
Nth
(A
4
~ A
7
:
Don’t Care)
相關(guān)PDF資料
PDF描述
K9F1216D0A 64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
K9F1216D0A-P 64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
K9F1216D0A-Y 64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
K9F1208X0A 64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
K9F1216X0A CAT5E PATCH CORD 100MHZ 4 FOOT BLUE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K9F1208D0B 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory
K9F1208D0B-D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory
K9F1208D0B-Y 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory
K9F1208Q0A 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
K9F1208Q0A-XXB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb/256Mb 1.8V NAND Flash Errata
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