參數(shù)資料
型號: K9K1G16Q0A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128M x 8 Bit / 64M x 16 Bit NAND Flash Memory
中文描述: 128M的× 8位/ 64米× 16位NAND閃存
文件頁數(shù): 33/43頁
文件大小: 906K
代理商: K9K1G16Q0A
FLASH MEMORY
33
K9K1G08U0A
K9K1G08Q0A
K9K1G16U0A
K9K1G16Q0A
Preliminary
Figure 12. Sequential Row Read2 Operation
PAGE PROGRAM
The device is programmed basically on a page basis, but it does allow multiple partial page programing of a byte or consecutive bytes
up to 528, in a single page program cycle. The number of consecutive partial page programming operation within the same page with-
out an intervening erase operation must not exceed 1 for main array and 2 for spare array. The addressing may be done in any ran-
dom order in a block. A page program cycle consists of a serial data loading period in which up to 528 bytes of data may be loaded
into the page register, followed by a non-volatile programming period where the loaded data is programmed into the appropriate cell.
Serial data loading can be started from 2nd half array by moving pointer. About the pointer operation, please refer to the attached
technical notes.
The serial data loading period begins by inputting the Serial Data Input command(80h), followed by the four cycle address input and
then serial data loading. The bytes other than those to be programmed do not need to be loaded.The Page Program confirm com-
mand(10h) initiates the programming process. Writing 10h alone without previously entering the serial data will not initiate the pro-
gramming process. The internal write state control automatically executes the algorithms and timings necessary for program and
verify, thereby freeing the system controller for other tasks. Once the program process starts, the Read Status Register command
may be entered, with RE and CE low, to read the status register. The system controller can detect the completion of a program cycle
by monitoring the R/B output, or the Status bit(I/O 6) of the Status Register. Only the Read Status command and Reset command are
valid while programming is in progress. When the Page Program is complete, the Write Status Bit(I/O 0) may be checked(Figure 13).
The internal write verify detects only errors for "1"s that are not successfully programmed to "0"s. The command register remains in
Read Status command mode until another valid command is written to the command register.
50h
A
0
~ A
3
& A
9
~ A
26
I/O
0
~
7
R/B
Start Add.(4Cycle)
Data Output
Data Output
Data Output
2nd
Nth
(16Byte)
(16Byte)
1st
Figure 13. Program & Read Status Operation
80h
A
0
~ A
7
& A
9
~ A
26
528 Byte Data
I/O
0
~
7
R/B
Address & Data Input
I/O
0
Pass
10h
70h
Fail
t
R
t
R
t
R
t
PROG
Data Field
Spare Field
1st
Block
Nth
(A
4
~ A
7
:
Don
t Care)
相關(guān)PDF資料
PDF描述
K9K1G16U0A 128M x 8 Bit / 64M x 16 Bit NAND Flash Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K9K1G16U0A 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128M x 8 Bit / 64M x 16 Bit NAND Flash Memory
K9K2G08Q0M 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9K2G08Q0M-P 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9K2G08Q0M-PCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
K9K2G08Q0M-PIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory