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參數(shù)資料
| 型號： | K9K2G08Q0M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | ER 19C 19#12 SKT PLUG |
| 中文描述： | 256M × 8位/ 128M的× 16位NAND閃存 |
| 文件頁數(shù)： | 34/40頁 |
| 文件大?。?/td> | 641K |
| 代理商： | K9K2G08Q0M |
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FLASH MEMORY
34
K9W4G08U1M
K9K2G08U0M
K9W4G16U1M
K9K2G16Q0M
K9K2G16U0M
K9K2G08Q0M
Cache Program
Cache Program is an extension of Page Program, which is executed with 2112byte(X8 device) or 1056word(X16 device) data regis-
ters, and is available only within a block. Since the device has 1 page of cache memory, serial data input may be executed while data
stored in data register are programmed into memory cell.
Figure 9. Random Data Input In a Page
80h
R/B
Address & Data Input
I/O
0
Pass
10h
70h
Fail
t
PROG
85h
Address & Data Input
After writing the first set of data up to 2112byte(X8 device) or 1056word(X16 device) into the selected cache registers, Cache Pro-
gram command (15h) instead of actual Page Program (10h) is inputted to make cache registers free and to start internal program
operation. To transfer data from cache registers to data registers, the device remains in Busy state for a short period of time(tCBSY)
and has its cache registers ready for the next data-input while the internal programming gets started with the data loaded into data
registers. Read Status command (70h) may be issued to find out when cache registers become ready by polling the Cache-Busy sta-
tus bit(I/O 6). Pass/fail status of only the previouse page is available upon the return to Ready state. When the next set of data is
inputted with the Cache Program command, tCBSY is affected by the progress of pending internal programming. The programming of
the cache registers is initiated only when the pending program cycle is finished and the data registers are available for the transfer of
data from cache registers. The status bit(I/O5) for internal Ready/Busy may be polled to identify the completion of internal program-
ming. If the system monitors the progress of programming only with R/B, the last page of the target programming sequence must be
progammed with actual Page Program command (10h).
Figure 10. Cache Program
(available only within a block)
80h
R/B
80h
Address &
Data Input
15h
80h
Address &
Data Input
15h
80h
Address &
Data Input
10h
t
CBSY
t
CBSY
t
CBSY
t
PROG
70h
Address &
Data Input*
15h
I/Ox
Col Add1,2 & Row Add1,2,3
Data
Col Add1,2
Data
Col Add1,2 & Row Add1,2,3
Data
Col Add1,2 & Row Add1,2,3
Data
Col Add1,2 & Row Add1,2,3
Data
Col Add1,2 & Row Add1,2,3
Data
"0"
"1"
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9K2G16Q0M | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K4G08U1M | 256M x 8 Bit / 128M x 16 Bit / 512M x 8 Bit NAND Flash Memory |
| K9S1208V0M-SSB0 | 64M x 8 Bit SmartMedia Card |
| K9S1208V0 | 64MB & 128MB SmartMediaTM Card |
| K9D1G08V0M | 64MB & 128MB SmartMediaTM Card |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9K2G08Q0M-P | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08Q0M-PCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08Q0M-PIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08Q0M-Y | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08Q0M-YCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
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