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參數(shù)資料
| 型號(hào)： | K9K2G08U0M-YCB0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| 中文描述： | 256M × 8位/ 128M的× 16位NAND閃存 |
| 文件頁數(shù)： | 35/38頁 |
| 文件大?。?/td> | 734K |
| 代理商： | K9K2G08U0M-YCB0 |
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FLASH MEMORY
35
K9K2G08Q0M-YCB0,YIB0,PCB0,PIB0
K9K2G08U0M-YCB0,YIB0,PCB0,PIB0
K9K2G16Q0M-YCB0,YIB0,PCB0,PIB0
K9K2G16U0M-YCB0,YIB0,PCB0,PIB0
K9K2G08U0M-VCB0,VIB0,FCB0,FIB0
Figure 14. Read ID Operation
CE
CLE
I/O
X
ALE
RE
WE
90h
00h
Address. 1cycle
Maker code
Device code
t
CEA
t
AR1
t
REA
Read ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Five read cycles sequentially output the manufacturer code(ECh), and the device code and XXh, 4th cycle ID, 44h respectively.
The command register remains in Read ID mode until further commands are issued to it. Figure 14 shows the operation sequence.
Device
Code*
XXh
4th Cyc.*
ECh
Figure 15. RESET Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 3 for device status after reset operation. If the device is
already in reset state a new reset command will be accepted by the command register. The R/B pin transitions to low for tRST after
the Reset command is written. Refer to Figure 15 below.
FFh
I/O
X
R/B
t
RST
t
WHR
t
CLR
Device
Device Code*(2nd Cycle)
4th Cycle*
K9K2G08Q0M
AAh
15h
K9K2G08U0M
DAh
15h
K9K2G16Q0M
BAh
55h
K9K2G16U0M
CAh
55h
Table3. Device Status
After Power-up
After Reset
PRE status
High
Low
Waiting for next command
Operation Mode
First page data access is ready
00h command is latched
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9K2G08Q0M-P | DSUB 25 M PCR/A G |
| K9K2G08Q0M-PCB0 | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08Q0M-PIB0 | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G16Q0M-PIB0 | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08Q0M-Y | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9K2G08U0M-YIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
| K9K2G08U1A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128M x 8 Bit / 256M x 8 Bit NAND Flash Memory |
| K9K2G08X0A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FLASH MEMORY |
| K9K2G08X0A-J | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FLASH MEMORY |
| K9K2G16Q0M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
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