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參數(shù)資料
| 型號(hào)： | KAD5510P-50Q72 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 21/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 500MSPS SGL 72-QFN |
| 產(chǎn)品培訓(xùn)模塊： | High-Speed Analog-to-Digital Converters |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 500M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 438mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個(gè)差分，單極 |
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28
FN6811.2
October 8, 2009
Revision History
DATE
REVISION
CHANGE
8/6/08
Rev 1
Initial Release of Production Datasheet
12/5/08
FN6811.0
Converted to intersil template. Assigned file number FN6811. Rev 0 - first release (as
preliminary datasheet) with new file number.
1/19/09
FN6811.1
P1; revised Key Specs
P2; added Part Marking column to Order Info
P4; Moved Thermal Impedance under Thermal Info (used to be on p. 7). Added Theta JA
Note 2.
P4-7; edits throughout the Specs table. Added Notes 8 and 9. Revised Notes 6 and 7.
P7; Removed ESD section
P10-12; revised Performance Curves throughout
P14; User Inititated Reset section; revised 2nd sentence of 1st paragraph
P16; Nap/Sleep; revised 3rd and 4th sentences of 1st paragraph
P19; Serial Peripheral Interface; revised 2nd to last sentence of 1st paragraph. SPI
Physical Interface; revised 2nd and 3rd sentences of 4th paragraph
P20; added last 2 sentences to 1st paragraph of "ADDRESS 0X24: GAIN_FINE". Revised
Table 8
P21; revised last 2 sentences of "ADDRESS 0X71: PHASE_SLIP". Removed Figure of
"PHASE SLIP: CLK÷1 MODE, fCLOCK = 500MHz"
P24; revised Figure 43
P24; Table 17; revised Bits7:4, Addr C0
Throughout; formatted graphics to Intersil standards
2/25/09
6811.1
Changed date to 2009 from 2008 no rev
5/8/09
8/25/09
9/10/09
6811.2
1)Added nap mode, sleep mode wake up times to spec table
2) Added CSB,SCLK Setup time specs for nap,sleep modes to spec table
3) Changed SPI setup spec wording in
spec table
4) Change to pin description table for clarification
5) Added thermal pad note
7) Update multple device usage note on at “SPI Physical Interface” on page 20
8) Added ‘Reserved’ to SPI memory map
at address 25H
9) Added section on “ADC Evaluation Platform” on page 26
10) Updated table “DIFFERENTIAL SKEW ADJUSTMENT” on page 22..
11) Intersil Standards - Added Pb-free reflow link
12) Change to SPI interface section in spec table, timing in cycles now, added write, read
specific timing specs.
14) Updated wakeup time description in “Nap/Sleep” on page 17.
15) Updated sleep mode power spec
16) Changed label in Figure 44
17) Updated cal paragraph in user initiated reset section per DC
Changed standard over-temp from “Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested” TO “Parameters with Min and/or MAX limits
are 100% production tested at their worst case temperature extreme ( +85°C) per Jeff
Rogers and Gary Hendrickson.” Updated Note references in Electrical Spec Table.
KAD5510P-50
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| KAD5512HP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Performance 12-Bit, 250/210/170/125MSPS ADC |
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| KAD5512HP_0910 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High Performance 12-Bit, 250/210/170/125MSPS ADC |
| KAD5512HP-12Q48 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 125MSPS HI PERF SINGLE ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| KAD5512HP-12Q72 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-BIT 125MSPS HI PERF SINGLE ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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