參數(shù)資料
型號(hào)： KFG2816U1M-PED
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： OneNAND SPECIFICATION
中文描述： OneNAND的規(guī)格
文件頁數(shù)： 29/87頁
文件大?。?/td> 1175K
代理商： KFG2816U1M-PED
OneNAND128
FLASH MEMORY
29
7.23 Interrupt Status Register (R/W): F241h,
default=8080h(after Cold reset),8010h(after Warm/Hot reset)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
INT
Reserved(0000000)
RI
WI
EI
RSTI
Reserved(0000)
7.24 Start Block Address (R/W): F24Ch, default=0000h
SBA
(Lock/Unlock/Lock-tight Start Block Address): Start NAND Flash block address in Write Protection mode, which follows ’Lock block command’ or
’Unlock block command’ or ’Lock-tight command’.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved(00000000)
SBA
7.25 End Block Address (R/W): F24Dh, default=0000h
EBA
(Lock/Unlock/Lock-tight End Block Address): End NAND Flash block address in Write Protection mode, which follows ’Lock block command’ or
’Unlock block command’ or ’Lock-tight command’. EBA should be equal to or larger than SBA.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved(00000000)
EBA
Device
Number of Block
SBA/EBA
128Mb
256
[7:0]
Bit
Address
Bit Name
Default State
Cold
1
Valid
States
Function
Warm/Hot
1
15
INT(interrupt): the master interrupt bit
- Set to ’1’ of itself when one or more of RI, WI, EI and
RSTI is set to ’1’, or Unlock(0023h), Lock(002Ah), Lock-
tight(002Ch), or Erase Verify Read(0071h), or OTP
access(0065h) operation, or "Load Data into Buffer" is
completed.
- Cleared to ’0’ when by writing ’0’ to this bit or by
reset(Cold/Warm/Hot reset).
’0’ in this bit means that INT pin is low status.
(This INT bit is directly wired to the INT pin on the chip.
INT pin goes low upon writing ’0’ to this bit when
INTpol is high and goes high upon writing ’0’ to this
bit when INTpol is low. )
RI(Read Interrupt):
- Set to ’1’ of itself at the completion of Load Operation
(0000h, 0013h, or boot is done.)
- Cleared to ’0’ when by writing ’0’ to this bit or by reset
(Cold/Warm/Hot reset).
WI(Write Interrupt):
- Set to ’1’ of itself at the completion of Program Operation
(0080h, 001Ah, or 001Bh)
- Cleared to ’0’ when by writing ’0’ to this bit or by reset
(Cold/Warm/Hot reset).
EI(Erase Interrupt):
- Set to ’1’ of itself at the completion of Erase Operation
(0094h, 0095h, or 0030h)
- Cleared to ’0’ when by writing ’0’ to this bit or by reset
(Cold/Warm/Hot reset).
RSTI(Reset Interrupt):
- Set to ’1’ of itself at the completion of Reset Operation
(00B0h, 00F0h, 00F3h, or warm reset is released.)
- Cleared to ’0’ when by writing ’0’ to this bit.
0
Interrupt Off
Interrupt Pending
0->1
7
1
0
0
Interrupt Off
Interrupt Pending
0->1
6
0
0
0
Interrupt Off
Interrupt Pending
0->1
5
0
0
0
Interrupt Off
Interrupt Pending
0->1
4
0
1
0
Interrupt Off
Interrupt Pending
0->1
相關(guān)PDF資料
PDF描述
KFG2816U1M-PIB OneNAND SPECIFICATION
KFG2816U1M-PID OneNAND SPECIFICATION
KFG2816D1M-DEB OneNAND SPECIFICATION
KFG2816D1M-DED OneNAND SPECIFICATION
KFG2816D1M-DIB OneNAND SPECIFICATION
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