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參數(shù)資料
| 型號： | KIT33975AEWEVBE |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVALUATION FOR MC33975 |
| 標準包裝： | 1 |
| 主要目的： | 接口，開關探測 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33975 |
| 主要屬性： | 8 可編程輸入（電池開關或接地開關） |
| 次要屬性： | 14 開關至接地輸入 |
| 已供物品： | 板，CD |
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Analog Integrated Circuit Device Data
10
Freescale Semiconductor
33975
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Pulse Wetting Current Time
tPULSE(ON)
15
16
22
ms
Interrupt Delay Time
Normal Mode
tINT-DLY
–
5.0
16
s
Sleep Mode Switch Scan Time
tSCAN
100
200
300
s
Calibrated Scan Timer Accuracy
Sleep Mode
tSCAN TIMER
–
10
%
Calibrated Interrupt Timer Accuracy
Sleep Mode
tINT TIMER
–
10
%
DIGITAL INTERFACE TIMING(13)
Required Low State Duration on VPWR for Reset(14)
VPWR 0.2V
tRESET
–
10
s
Falling Edge of CS to Rising Edge of SCLK
Required Setup Time
tLEAD
100
–
ns
Falling Edge of SCLK to Rising Edge of CS
Required Setup Time
tLAG
50
–
ns
SI to Falling Edge of SCLK
Required Setup Time
tSI(SU)
16
–
ns
Falling Edge of SCLK to SI
Required Hold Time
tSI(HOLD)
20
–
ns
SI, CS, SCLK Signal Rise Time(15)
tR(SI)
–
5.0
–
ns
SI, CS, SCLK Signal Fall Time(15)
tF(SI)
–
5.0
–
ns
Time from Falling Edge of CS to SO Low Impedance(16)
tSO(EN)
–
55
ns
Time from Rising Edge of CS to SO High Impedance(17)
tSO(DIS)
–
55
ns
Time from Rising Edge of SCLK to SO Data Valid(18)
tVALID
–
25
55
ns
Notes
13.
These parameters are guaranteed by design. Production test equipment uses 4.16 MHz, 5.0V SPI interface.
14.
This parameter is guaranteed by design but not production tested.
15.
Rise and Fall time of incoming SI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
16.
Time required for valid output status data to be available on the SO pin.
17.
Time required for output states data to be terminated at the SO pin.
18.
Time required to obtain valid data out from SO following the rise of SCLK with a 200pF load.
Table 5. Dynamic Electrical Characteristics
Characteristics noted under conditions of 3.0V
VDD 5.5V, 8.0V VPWR 28V, -40C TC 125C, unless otherwise noted.
Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13 V, TA = 25C.
Characteristic
Symbol
Min
Typ
Max
Unit
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| KIT33982CEVBE | 功能描述:電源管理IC開發(fā)工具 2.0 M HIGH-SIDE SW RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
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| KIT33984CEVBE | 功能描述:電源管理IC開發(fā)工具 4.0 M HIGH-SIDE SW RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| KIT33984PNAEVB | 功能描述:電源管理IC開發(fā)工具 33984 - SPD4 EVAL KIT RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| KIT33988CEVBE | 功能描述:電源管理IC開發(fā)工具 HIGH SIDE SWITCH (8.0M) RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
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