參數(shù)資料
型號(hào): KM44L32031BT-G(F)Y
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: DDR SDRAM Specification Version 0.61
中文描述: DDR SDRAM的規(guī)格版本0.61
文件頁(yè)數(shù): 32/53頁(yè)
文件大?。?/td> 669K
代理商: KM44L32031BT-G(F)Y
- 32 -
REV. 1.0 November. 2. 2000
128Mb DDR SDRAM
3.3.14 Power down
CKE
Precharge
Active
Active
power
down
Exit
Read
Active
power
down
Entry
power
down
Entry
Precharge
Command
CK
CK
The power down mode is entered when CKE is low and exited when CKE is high. Once the power down
mode is initiated, all of the receiver circuits except clock, CKE and DLL circuit tree are gated off to reduce
power consumption. All banks should be in idle state prior to entering the precharge power down mode and
CKE should be set high at least 1tck+tIS prior to row active command . During power down mode, refresh
operations cannot be performed, therefore the device cannot be remained in power down mode longer than
the refresh period(Data retension time) of the device.
Figure 23. Power down entry and exit timing
相關(guān)PDF資料
PDF描述
KM48L16031BT-G(F)Y DDR SDRAM Specification Version 0.61
KM416L8031BT-G(F)Y DDR SDRAM Specification Version 0.61
KM44L32031BT-G(F)Z DDR SDRAM Specification Version 0.61
KM48L16031BT-G(F)Z DDR SDRAM Specification Version 0.61
KM416L8031BT-G(F)Z DDR SDRAM Specification Version 0.61
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KM44L32031BT-GLZ/Y/0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR SDRAM Specification Version 1.0
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KM44S32030B 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
KM44S32030BT-G/F10 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL