參數(shù)資料
型號: KM48C512D
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: High Speed 512K x 8Bit CMOS Dynamic RAM with with Fast Page Mode(高速512K x 8位 CMOS 動態(tài)RAM(帶快速頁模式))
中文描述: 高速的CMOS為512k × 8位動態(tài)隨機(jī)存儲器與快速頁面模式(高速為512k × 8位的CMOS動態(tài)隨機(jī)存儲器(帶快速頁模式))
文件頁數(shù): 4/20頁
文件大小: 346K
代理商: KM48C512D
KM48C512D
CMOS DRAM
High Speed
*Note :
I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
, I
CC3
, I
CC6
and I
CC7,
address can be changed maximum once while RAS=V
IL
. In
I
CC4
, address can be changed maximum once within one fast page mode cycle time,
t
PC
.
DC AND OPERATING CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
I
CC1
* : Operating Current (RAS and CAS, Address cycling @
t
RC
=min.)
I
CC2
: Standby Current (RAS=CAS=W=V
IH
)
I
CC3
* : RAS-only Refresh Current (CAS=V
IH
, RAS, Address cycling @
t
RC
=min.)
I
CC4
* : Fast Page Mode Current (RAS=V
IL
, CAS, Address cycling @
t
PC
=min.)
I
CC5
: Standby Current (RAS=CAS=W=V
CC
-0.2V)
I
CC6
* : CAS-Before-RAS Refresh Current (RAS and CAS cycling @
t
RC
=min.)
I
CC7
: Battery back-up current, Average power supply current, Battery back-up mode
Input high voltage(V
IH
)=V
CC
-0.2V, Input low voltage(V
IL
)=0.2V, CAS=0.2V,
DQ=Don
t care, T
RC
=31.25us, T
RAS
=T
RAS
min~300ns
I
CCS
: Self Refresh Current
RAS=CAS=V
IL
, W=OE=A0 ~ A9 =V
CC
-0.2V or 0.2V,
DQ0 ~ DQ7=V
CC
-0.2V, 0.2V or Open
Symbol
Power
Max
Units
I
CC1
Don
t care
140
mA
I
CC2
Don
t care
2
mA
I
CC3
Don
t care
140
mA
I
CC4
Don
t care
110
mA
I
CC5
Normal
L
1
150
mA
uA
I
CC6
Don
t care
140
mA
I
CC7
L
300
uA
I
CCS
L
200
uA
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