參數資料
型號： KM68V512B
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 64Kx8 bit Low Power and Low Voltage CMOS Static RAM(64K x8位高速CMOS 靜態(tài) RAM)
中文描述： 64Kx8位低功耗和低電壓的CMOS靜態(tài)RAM（64K的x8位高速的CMOS靜態(tài)RAM）的
文件頁數： 4/10頁
文件大?。?/td> 158K
代理商： KM68V512B
KM68V512B, KM68U512B Family
CMOS SRAM
Advance
Revision 0.0
November 1997
4
RECOMMENDED DC OPERATING CONDITIONS
1)
Note:
1. Commercial Product : T
A
=0 to 70
°
C, otherwise specified
Industrial Product : T
A
=-40 to 85
°
C, otherwise specified
2. Overshoot : V
CC
+3.0V in case of pulse width
≤
30ns
3. Undershoot : -3.0V in case of pulse width
≤
30ns
4. Overshoot and undershoot are sampled, not 100% tested
Item
Symbol
Product
Min
Typ
Max
Unit
Supply voltage
Vcc
KM68V512B Family
3.0
3.3
3.6
V
KM68U512B Family
2.7
3.0
3.3
V
Ground
Vss
All Family
0
0
0
V
Input high voltage
V
IH
KM68V512B, KM68U512B Family
2.2
-
Vcc+0.3V
2)
V
Input low voltage
V
IL
KM68V512B, KM68U512B Family
-0.3
3)
-
0.6
V
CAPACITANCE
1)
(f=1MHz, T
A
=25
°
C)
1. Capacitance is sampled, not 100% tested
Item
Symbol
Test Condition
Min
Max
Unit
Input capacitance
C
IN
V
IN
=0V
-
6
pF
Input/Output capacitance
C
IO
V
IO
=0V
-
8
pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min
Typ
Max
Unit
Input leakage current
I
LI
V
IN
=Vss to Vcc
-1
-
1
μ
A
μ
A
Output leakage current
I
LO
CS
1
=V
IH
or CS
2
=V
IL
or OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
-1
-
1
Operating power supply
I
CC
I
IO
=0mA, CS
1
=V
IL
, CS
2
=V
IH,
V
IN
=V
IH
or V
IL,
Read
-
-
5
mA
Average operating
current
I
CC1
Cycle time=1
μ
s, 100% duty, I
IO
=0mA,
CS
1
≤
0.2V, CS
2
≥
Vcc-0.2V, V
IN
≤
0.2V or V
IN
≥
Vcc-0.2V
-
-
5
mA
I
CC2
Cycle time=Min, 100% duty, I
IO
=0mA
CS
1
=V
IL
, CS
2
=V
IH
, V
IN
=V
IL
or V
IH
KM68V512B
-
-
30
mA
KM68U512B
-
-
25
mA
Output low voltage
V
OL
I
OL
=2.1mA
-
-
0.4
V
Output high voltage
V
OH
I
OH
=-1.0mA
2.4
-
-
V
Standby Current(TTL)
I
SB
CS
1
=V
IH
, CS
2
=V
IL
, Other inputs=V
IL
or V
IH
-
-
0.3
mA
Standby Current
I
SB1
CS
1
≥
Vcc-0.2V, CS
2
≥
Vcc-0.2V, or CS
2
≤
0.2V
,
Other inputs=0~Vcc
-
-
10
μ
A
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