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參數(shù)資料
| 型號： | KMM377S6427T1 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64Mx72 SDRAM DIMM(64Mx72 動態(tài) RAM模塊) |
| 中文描述： | 64Mx72 SDRAM的內(nèi)存（64Mx72動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 236K |
| 代理商： | KMM377S6427T1 |
REV. 4 July 1998
Preliminary
KMM377S6427T1
SDRAM MODULE
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
CAS
Latency
Version
Unit
Note
-8
-H
-L
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
OL
= 0 mA
2,540
2,450
2,450
mA
1
Precharge standby current in
power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 15ns
38
mA
3
I
CC2
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
38
Precharge standby current in
non power-down mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 15ns
Input signals are changed one time during 30ns
540
mA
3
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
270
Active standby current in
power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 15ns
180
mA
3
I
CC3
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
180
Active standby current in
non power-down mode
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 15ns
Input signals are changed one time during 30ns
900
mA
3
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
630
mA
3
Operating current
(Burst mode)
I
CC4
I
OL
= 0mA
Page burst
2Banks activated
t
CCD
=2CLK
3
2,990
2,540
2,540
mA
1
2
2,360
2,540
2,360
Refresh current
I
CC5
t
RC
≥
t
RC
(min)
3,780
mA
2
Self refresh current
I
CC6
CKE
≤
0.2V
38
mA
3
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Measured with 1 PLL & 3 Drive ICs.
Notes :
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