DRAM MODULE
KMM466F203CS2-L
KMM466F213CS2-L
KMM466F203CS2-L & KMM466F213CS2-L EDO Mode
2M x 64 DRAM SODIMM using 2Mx8, 2K & 4K Refresh, 3.3V, Low power/Self-Refresh
The Samsung KMM466F20(1)3CS2-L is a 2Mx64bits Dynamic
RAM
high
density
memory
KMM466F20(1)3CS2-L consists of eight CMOS 2Mx8bits
DRAMs in TSOP 400mil packages and a 1K or 2K EEPROM
in 8-pin TSSOP package mounted on a 144-pin glass-epoxy
substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on
the
printed
circuit
board
KMM466F20(1)3CS2-L is a Small Out-line Dual in-line Mem-
ory Module and is intended for mounting into 144 pin edge
connector sockets.
module.
The
Samsung
for
each
DRAM.
The
Part Identification
- KMM466F203CS2-L(4096 cycles/128ms, TSOP, L-ver)
- KMM466F213CS2-L(2048 cycles/128ms, TSOP, L-ver)
Extended Data Out Mode Operation
New JEDEC standard proposal with EEPROM
Serial Presense Detect with EEPROM
CAS-before-RAS Refresh capability
Self -refresh capability
RAS-only and Hidden refresh capability
LVTTL compatible inputs and outputs
Single +3.3V
±
0.3V power supply
PCB : Height(1000mil), Double sided component
GENERAL DESCRIPTION
FEATURES
PERFORMANCE RANGE
t
RAC
Speed
t
CAC
t
RC
t
HPC
-L5
50ns
13ns
84ns
20ns
-L6
60ns
15ns
104ns
25ns
PIN CONFIGURATIONS
Note : A11 is used for only KMM466F203CS2-L (4K ref.)
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
Front
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
V
SS
CAS0
CAS1
V
CC
A0
A1
A2
V
SS
DQ8
DQ9
DQ10
DQ11
V
CC
DQ12
Pin
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
Back
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
V
SS
CAS4
CAS5
V
CC
A3
A4
A5
V
SS
DQ40
DQ41
DQ42
DQ43
V
CC
DQ44
Pin
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
Front
DQ13
DQ14
DQ15
V
SS
RSVD
RSVD
RFU
V
CC
RFU
W
RAS0
NC
OE
V
SS
RSVD
RSVD
V
CC
DQ16
DQ17
DQ18
DQ19
V
SS
DQ20
DQ21
Pin
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
Back
DQ45
DQ46
DQ47
V
SS
RSVD
RSVD
RFU
V
CC
RFU
RFU
RFU
RFU
RFU
V
SS
RSVD
RSVD
V
CC
DQ48
DQ49
DQ50
DQ51
V
SS
DQ52
DQ53
Pin
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
Front
DQ22
DQ23
V
CC
A6
A8
V
SS
A9
A10
V
CC
CAS2
CAS3
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
**SDA
V
CC
Pin
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
Back
DQ54
DQ55
V
CC
A7
N.C
V
SS
NC
A11
V
CC
CAS6
CAS7
Vss
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
Vss
**SCL
V
CC
PIN NAMES
Pin Name
A0 to 11
A0 to 10
DQ0 - DQ63
W
OE
RAS0
CAS0 - CAS7
V
CC
V
SS
NC
**SDA
**SCL
RSVD
RFU
* These pins are not used in this module.
* * These pins should be NC in the system
which does not support SPD.
Function
Address Inputs (4K ref.)
Address Inputs (2K ref.)
Data In/Out
Read/Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power(+3.3V)
Ground
No Connection
Serial Address / Data I/O
Serial Clock
Reserved Use
Reserved for Future Use