參數(shù)資料
型號: KMPC8560VT833LB
廠商: Freescale Semiconductor
文件頁數(shù): 18/36頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC III 783-FCPBGA
標準包裝: 2
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 833MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 784-BBGA,F(xiàn)CBGA
供應商設備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MOTOROLA
MPC8560 PowerQUICC III
25
Integrated Communications Processor Product Brief
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Examples of Communications Systems
5.2.1
Remote Access Server
Figure 8 shows a remote access server configuration.
Figure 8. Remote Access Server Configuration
In this application, eight TDM ports are connected to external framers. In the MPC8560, each group of four
ports supports up to 128 channels. One TDM interface can support 32–128 channels. The MPC8560
receives and transmits data in transparent or HDLC mode and stores or retrieves the channelized data from
memory. The data can be stored either in the DDR SDRAM memory or in memory residing on the local bus.
The main trunk can be configured as one of the following:
155-Mbps full-duplex ATM, using the UTOPIA interface
10/100/1000BaseT Ethernet with MII/GMII/RGMII interface
High-speed serial channel (up to 45 Mbps)
In ATM mode, there may be a need to store connection tables in external memory on the local bus (if more
than 128 active connections are needed). The need for local bus memory depends on the total throughput of
the system. The MPC8560 supports automatic (no software intervention) cross connect between ATM and
MCC, routing ATM AAL1 frames to MCC slots.
MPC8560
TDM0
TDM7
Quad
T1
Framer
UTOPIA
DDR SDRAM
Channelized Data
Local Bus
SDRAM/DRAM/SRAM
ATM
Connection Tables
(up to 256 channels)
I2C/SPI/SCC
Slow
Comm
PHY
10/100/1000
E3 Clear Channel
(takes one TDM)
and
or
DSP Bank
DSP
(optional)
Framer
MII/GMII/RGMII
Transceiver
155-Mbps
PHY
ATM
PCI/PCI-X
PCI Peripherals
Multi PHY
or
BaseT
RapidIO
Bus
RapidIO–Enabled
Processor/Peripheral
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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