參數(shù)資料
型號： KS8995MI
廠商： Micrel Inc
文件頁數(shù)： 54/73頁
文件大小： 0K
描述： IC SWITCH 10/100 5PORT 128PQFP
標準包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 散裝
其它名稱： 576-1020
KS8995M
Micrel
M9999-120403
58
December 2003
For port 2, the base is 0x20, same offset definition (0x20-0x3f)
For port 3, the base is 0x40, same offset definition (0x40-0x5f)
For port 4, the base is 0x60, same offset definition (0x60-0x7f)
For port 5, the base is 0x80, same offset definition (ox80-0x9f)
Address
Name
Description
Mode
Default
Format of Per Port MIB Counters (16 entries)
31
Overflow
1, Counter overflow
RO
0
0, No Counter overflow
30
Count Valid
1, Counter value is valid
RO
0
0, Counter value is not valid
29-0
Counter values
Counter value
RO
0
Offset
Counter Name
Description
0x100
Port1 Tx Drop Packets
Tx packets dropped due to lack of resources
0x101
Port2 Tx Drop Packets
Tx packets dropped due to lack of resources
0x102
Port3 Tx Drop Packets
Tx packets dropped due to lack of resources
0x103
Port4 Tx Drop Packets
Tx packets dropped due to lack of resources
0x104
Port5 Tx Drop Packets
Tx packets dropped due to lack of resources
0x105
Port1 Rx Drop Packets
Rx packets dropped due to lack of resources
0x106
Port2 Rx Drop Packets
Rx packets dropped due to lack of resources
0x107
Port3 Rx Drop Packets
Rx packets dropped due to lack of resources
0x108
Port4 Rx Drop Packets
Rx packets dropped due to lack of resources
0x109
Port5 Rx Drop Packets
Rx packets dropped due to lack of resources
Table 16. All Port Dropped Packet MIB Counters
Address
Name
Description
Mode
Default
Format of All Port Dropped Packet MIB Counters
30-16
Reserved
N/A
15-0
Counter values
Counter value
RO
0
Note:
All port dropped packet MIB counters do not indicate overflow or validity; therefore the application must keep track of overflow and valid conditions.
Examples:
(1) MIB counter read (read port 1 rx 64 counter)
Write to reg110 with 0x1c (read MIB counters
selected)
Write to reg111 with 0xe (trigger the read operation)
Then
Read reg117 (counter value 31-24)
// If bit 31 = 1, there was a counter overflow.
// If bit 30 = 0, restart (reread) from this register.
Read reg118 (counter value 23-16)
Read reg119 (counter value 15-8)
Read reg120 (counter value 7-0)
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