參數(shù)資料
型號(hào): KSZ8031RNLI
廠商: Micrel Inc
文件頁(yè)數(shù): 1/43頁(yè)
文件大?。?/td> 0K
描述: TXRX PHY 10/100 3.3V 24-QFN
標(biāo)準(zhǔn)包裝: 75
類型: PHY 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: RMII
電源電壓: 1.8V,2.5V,3.3V
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN(4x4)
包裝: 管件
配用: 576-3862-ND - BOARD EVALUATION FOR KSZ8031RNL
其它名稱: 576-3788
KSZ8021RNL / KSZ8031RNL
10Base-T/100Base-TX PHY
with RMII Support
LinkMD is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (
408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
August 2010
M9999-082710-1.0
General Description
The KSZ8031RNL is a single-supply 10Base-T/100Base-
TX Ethernet physical layer transceiver for transmission
and reception of data over standard CAT-5 unshielded
twisted pair (UTP) cable.
The KSZ8031RNL is a highly-integrated, compact solution.
It reduces board cost and simplifies board layout by using
on-chip termination resistors for the differential pairs, by
integrating a low noise regulator to supply the 1.2V core,
and by offering 1.8/2.5/3.3V digital I/O interface support.
The KSZ8031RNL offers the Reduced Media Independent
Interface (RMII) for direct connection to RMII-compliant
MACs in Ethernet processors and switches.
As the power-up default, the KSZ8031RNL uses a 25MHz
crystal to generate all required clocks, including the
50MHz RMII reference clock output for the MAC. The
KSZ8021RNL is the version that takes in the 50MHz RMII
reference clock as the power-up default.
To facilitate system bring-up and debugging in production
testing and in product deployment, parametric NAND tree
support enables fault detection between KSZ8031RNL
I/Os and board, while Micrel’s LinkMD
TDR-based cable
diagnostics permit identification of faulty copper cabling.
The KSZ8031RNL and KSZ8021RNL are available in 24-
pin, lead-free QFN packages (see Ordering Information).
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Features
Single-chip 10Base-T/100Base-TX IEEE 802.3
compliant Ethernet Transceiver
RMII v1.2 Interface support with 50MHz reference clock
output to MAC, and option to input 50MHz reference
clock
RMII back-to-back mode support for 100Mbps copper
repeater or media converter
MDC/MDIO Management Interface for PHY register
configuration
Programmable interrupt output
LED outputs for link and activity status indication
On-chip termination resistors for the differential pairs
Baseline Wander Correction
HP Auto MDI/MDI-X for reliable detection and
correction for straight-through and crossover cables
with disable and enable option
Auto-negotiation to automatically select the highest link-
up speed (10/100 Mbps) and duplex (half/full)
Power down and power saving modes
LinkMD TDR-based cable diagnostics for identification
of faulty copper cabling
Parametric NAND Tree support for fault detection
between chip I/Os and board
____________________________________________________________________________________________________________
Functional Diagram
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