參數(shù)資料
型號： KSZ8001L-EVAL
廠商： Micrel Inc
文件頁數(shù)： 9/46頁
文件大小： 0K
描述： BOARD EVALUATION FOR KSZ8001L
標準包裝： 1
主要目的： 接口，以太網(wǎng) PHY
嵌入式： 否
已用 IC / 零件： KSZ8001L
主要屬性： 單芯片 PHY，100BASE-TX/100BASE-FX/10BASE-T
次要屬性： MII，RMII，SMII，HP 自動 MDI，MDI-X 自動極性校正，LinkMD
已供物品： 板
相關產品： KSZ8001SA3-ND - TXRX 10/100 LINKMD 3.3V 48-SSOP
KSZ8001LIA3-ND - TXRX 10/100 LINKMD 3.3V 48-LQFP
KSZ8001LA3TR-ND - TXRX 10/100 LINKMD 3.3V 48-LQFP
KSZ8001LA3-ND - TXRX 10/100 LINKMD 3.3V 48-LQFP
KSZ8001LA2TR-ND - TXRX 10/100 LINKMD 3.3V 48-LQFP
KSZ8001LA2-ND - TXRX 10/100 LINKMD 3.3V 48-LQFP
KSZ8001SL TR-ND - TXRX 10/100 LINKMD 3.3V 48-SSOP
576-2110-ND - TXRX 10/100 LINKMD 3.3V 48-SSOP
KSZ8001SI-ND - TXRX 10/100 LINKMD 3.3V 48-SSOP
KSZ8001S TR-ND - TXRX 10/100 LINKMD 3.3V 48-SSOP
更多...
其它名稱： 576-1620
Micrel
KSZ8001
June 2009
Revision 1.04
17
SMII Signal Definition
SMII is composed of two signals per port, a global synchronization signal, and a global 125MHz reference clock. All signals are
synchronous to the clock. All SMII I/F uses a common 125MHz reference clock and SYNC signals that are synchronous to the
reference clock. There are two signals in SMII from MAC-to-PHY for each port (TXD and TxSYNC), and one signal per port from
PHY-to-MAC (RXD).
The Serial Media Independent Interface (SMII) is designed to satisfy the following requirements:
Convey complete MII information between a 10/100 PHY and MAC with two pins per port.
Allow a multi-port MAC/PHY communication with one system clock.
Operate in both half and full duplex.
Per packet switching between 10Mbit and 100Mbit data rates.
Allow direct MAC-to-MAC communication.
SMII Signals
Signal Name
From
To
Use
RX
PHY
MAC
Receive Data and Control
TX
MAC
PHY
Transmit Data and Control
SYNC
MAC
PHY
Synchronization
Clock
System
MAC&PHY
Synchronization
Receive Path
Receive data and control information are signaled in ten bit segments. In 100Mbit mode, each segment represents a new byte of
data. In 10Mbit mode, each segment is repeated ten times; therefore, every ten segments represent a new byte of data. The MAC
can simply any one of every 10 segment ion 10Mbit mode.
Segment boundaries are delimited by SYNC. The MAC continuously generates a pulse on SYNC every 10 clocks.
Receive Sequence Diagram
C R S
R X _ D V
R XD 0
R XD 1
R XD 2
R XD 3
R XD 4
R XD 5
R XD 6
R X D 7
R X _C LK
RX _ S Y N C
RX
RX contains all of the information found on the receive path of the standard MII.
Bits
Purpose
CRS
Carrier Sense – identical to MII, except that it is not an asynchronous signal
RX_DV
Receive Data Valid – identical to MII
RXD7-0
Encoded Data, see the RXD0-7 Encoding table
RX – Bit Description
RXD7-0 are used to convey packet data, RX_ER, and PHY status. The MAC can infer the meaning of RXD on a segment-by-basis
by encoding the two control bits.
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KSZ8001LI TR 功能描述:以太網(wǎng) IC 10/100 BASE-TX/FX Physical Layer Transceiver with LinkMD cable diagnostics, Single 3.3V Supply, 48-LQFP, I-Temp, Lead Free RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8001LIA3 功能描述:TXRX 10/100 LINKMD 3.3V 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 標準包裝:1,140 系列:AU 類型:收發(fā)器 驅動器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND
KSZ8001S 功能描述:以太網(wǎng) IC 10/100 BASE-TX/FX Physical Layer Transceiver with LinkMD cable diagnostics, Single 3.3V Supply, 48-SSOP, Lead Free RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8001S TR 功能描述:以太網(wǎng) IC 10/100 BASE-TX/FX Physical Layer Transceiver with LinkMD cable diagnostics, Single 3.3V Supply, 48-SSOP, Lead Free RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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