參數(shù)資料
型號： KSZ8842-16MBLI
廠商： Micrel Inc
文件頁數(shù)： 104/141頁
文件大小： 0K
描述： IC ETHERNET SW 2PORT 100-LFBGA
標(biāo)準(zhǔn)包裝： 260
控制器類型： 以太網(wǎng)開關(guān)控制器
接口： PCI
電源電壓： 3.1 V ~ 3.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LBGA
供應(yīng)商設(shè)備封裝： 100-LFBGA
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
其它名稱： 576-3504
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
65
M9999-102207-1.9
Bank 16 Transmit Control Register (0x00): TXCR
This register holds control information programmed by the CPU to control the QMU transmit module function.
Bit
Default Value
R/W
Description
15
-
RO
Reserved
14
0x0
RW
Reserved
13
0x0
RW
Reserved
12-4
-
RO
Reserved
3
0x0
RW
TXFCE Transmit Flow Control Enable
When this bit is set, the QMU sends flow control pause frames from the host port if the
RX FIFO has reached its threshold.
Note: the SGCR3[5] in Bank 32 also needs to be enabled.
2
0x0
RW
TXPE Transmit Padding Enable
When this bit is set, the KSZ8842M automatically adds a padding field to a packet
shorter than 64 bytes.
Note: Setting this bit requires enabling the ADD CRC feature to avoid CRC errors for
the transmit packet.
1
0x0
RW
TXCE Transmit CRC Enable
When this bit is set, the KSZ8842M automatically adds a CRC checksum field to the
end of a transmit frame.
0
0x0
RW
TXE Transmit Enable
When this bit is set, the transmit module is enabled and placed in a running state.
When reset, the transmit process is placed in the stopped state after the transmission
of the current frame is completed.
Bank 16 Transmit Status Register (0x02): TXSR
This register keeps the status of the last transmitted frame.
Bit
Default Value
R/W
Description
15-6
0x000
RO
Reserved
5-0
-
RO
TXFID Transmit Frame ID
This field identifies the transmitted frame. All of the transmit status information in this
register belongs to the frame with this ID.
Bank 16 Receive Control Register (0x04): RXCR
This register holds control information programmed by the CPU to control the receive function.
Bit
Default Value
R/W
Description
15-11
-
RO
Reserved
10
0x0
RW
RXFCE Receive Flow Control Enable
When this bit is set, the KSZ8842M will acknowledge a PAUSE frame from the receive
interface; i.e., the outgoing packets are pending in the transmit buffer until the PAUSE
frame control timer expires. When this bit is cleared, flow control is not enabled.
9
0x0
RW
RXEFE Receive Error Frame Enable
When this bit is set, CRC error frames are allowed to be received into the RX queue.
When reset, all CRC error frames are discarded.
8
-
RO
Reserved
7
0x0
RW
RXBE Receive Broadcast Enable
When this bit is set, the RX module receives all the broadcast frames.
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參數(shù)描述
KSZ8842-16MBLI TR 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch + Generic (8, 16-Bit) Bus Interface (I-Temp, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8842-16MQL 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8842-16MQL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8842-16MQL Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8842-16MVL 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8842-16MVL TR 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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