參數(shù)資料
型號： KSZ8864RMNI
廠商： Micrel Inc
文件頁數(shù)： 65/111頁
文件大小： 0K
描述： IC ETHERNET SWITCH 4PORT 64QFN
特色產(chǎn)品： KSZ8864RMN Ethernet Switches
標(biāo)準(zhǔn)包裝： 348
系列： *
其它名稱： 576-3995
1997 Microchip Technology Inc.
DS30444E - page 57
PIC16C9XX
10.0
CAPTURE/COMPARE/PWM
(CCP) MODULE
The CCP (Capture/Compare/PWM) module contains a
16-bit register which can operate as a 16-bit capture
register, as a 16-bit compare register, or as a PWM
master/slave duty cycle register. Table 10-1 shows the
timer resources used by the CCP module.
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All three are readable and writ-
able.
Figure 10-1 shows the CCP1CON register.
For use of the CCP module, refer to the
Embedded
Control Handbook, "Using the CCP Modules" (AN594).
TABLE 10-1: CCP MODE - TIMER RESOURCE
CCP Mode
Timer Resource
Capture
Compare
PWM
Timer1
Timer2
FIGURE 10-1: CCP1CON REGISTER (ADDRESS 17h)
U-0
R/W-0
—
CCP1X
CCP1Y CCP1M3
CCP1M2
CCP1M1 CCP1M0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n =Value at POR reset
bit7
bit0
bit 7-6:
Unimplemented: Read as '0'
bit 5-4: CCP1X:CCP1Y: PWM Least Signicant bits
Capture Mode
Unused
Compare Mode
Unused
PWM Mode
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
bit 3-0: CCP1M3:CCP1M0: CCP1 Mode Select bits
0000
= Capture/Compare/PWM off (resets CCP1 module)
0100
= Capture mode, every falling edge
0101
= Capture mode, every rising edge
0110
= Capture mode, every 4th rising edge
0111
= Capture mode, every 16th rising edge
1000
= Compare mode, set output on match (bit CCP1IF is set)
1001
= Compare mode, clear output on match (bit CCP1IF is set)
1010
= Compare mode, generate software interrupt on match (bit CCP1IF is set, CCP1 pin is unaffected)
1011
= Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1)
11xx
= PWM mode
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