參數(shù)資料
型號： KSZ8864RMNI
廠商： Micrel Inc
文件頁數(shù)： 85/111頁
文件大?。?/td> 0K
描述： IC ETHERNET SWITCH 4PORT 64QFN
特色產(chǎn)品： KSZ8864RMN Ethernet Switches
標(biāo)準(zhǔn)包裝： 348
系列： *
其它名稱： 576-3995
1997 Microchip Technology Inc.
DS30444E - page 75
PIC16C9XX
11.3.1.2
RECEPTION
When the R/W bit of the address byte is clear and an
address match occurs, the R/W bit of the SSPSTAT reg-
ister is cleared. The received address is loaded into the
SSPBUF register.
When the address byte overow condition exists, then
no acknowledge (ACK) pulse is given. An overow con-
dition is dened as either bit BF (SSPSTAT<0>) is set
or bit SSPOV (SSPCON<6>) is set.
An SSP interrupt is generated for each data transfer
byte. Flag bit SSPIF (PIR1<3>) must be cleared in soft-
ware. The SSPSTAT register is used to determine the
status of the byte.
FIGURE 11-19: I2C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
P
9
8
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
S
A7 A6 A5 A4 A3 A2 A1
SDA
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
Bus Master
terminates
transfer
Bit SSPOV is set because the SSPBUF register is still full.
Cleared in software
SSPBUF register is read
ACK
Receiving Data
D0
D1
D2
D3
D4
D5
D6
D7
ACK
R/W=0
Receiving Address
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
SSPOV (SSPCON<6>)
ACK
ACK is not sent.
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