參數(shù)資料
型號(hào): KSZ8895MQ
廠商: Micrel Inc
文件頁(yè)數(shù): 40/119頁(yè)
文件大?。?/td> 0K
描述: IC ETHERNET SW 5PORT 128-PQFP
標(biāo)準(zhǔn)包裝: 66
控制器類型: 以太網(wǎng)開(kāi)關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
配用: 576-3871-ND - BOARD EVALUATION FOR KSZ8895MQ
其它名稱: 576-3753
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Micrel, Inc.
KSZ8895MQ/RQ/FMQ
PLL Clock Synthesizer
The KSZ8895MQ/RQ/FMQ generates 125MHz, 83MHz, 41MHz, 25MHz and 10MHz clocks for system timing.
Internal clocks are generated from an external 25MHz crystal or oscillator.
Scrambler/Descrambler (100BASE-TX only)
The purpose of the scrambler is to spread the power spectrum of the signal in order to reduce EMI and baseline
wander. The data is scrambled through the use of an 11-bit wide linear feedback shift register (LFSR). This can
generate a 2047-bit non-repetitive sequence. The receiver will then descramble the incoming data stream with the
same sequence at the transmitter.
100BASE-FX Operation
100BASE-FX operation is very similar to 100BASE-TX operation except that the scrambler/descrambler and MLT3
encoder/decoder are bypassed on transmission and reception. In this mode, the auto-negotiation feature is bypassed
since there is no standard that supports fiber auto-negotiation.
100BASE-FX Signal Detection
The physical port runs in 100BASE-FX fiber mode for the Port 3 and Port 4 of the KSZ8895FMQ. This signal is
internally referenced to 1.2V. The fiber module interface should be set by a voltage divider such that FXSDx ‘H’ is
above this 1.2V reference, indicating signal detect, and FXSDx ‘L’ is below the 1.2V reference to indicate no signal.
There is no auto-negotiation for 100BASE-FX mode, the ports must be forced to either full or half-duplex for the fiber
ports. Note that strap-in options support Port 3 and Port 4 to disable auto-negotiation, force 100Base-FX speed, force
duplex mode, and force flow control for KSZ8895FMQ with unmanaged mode.
100BASE-FX Far End Fault
Far end fault occurs when the signal detection is logically false from the receive fiber module. When this occurs, the
transmission side signals the other end of the link by sending 84 1s followed by a zero in the idle period between
frames.
10BASE-T Transmit
The output 10BASE-T driver is incorporated into the 100BASE-T driver to allow transmission with the same
magnetics. They are internally wave-shaped and pre-emphasized into outputs with a typical 2.3V amplitude. The
harmonic contents are at least 27dB below the fundamental when driven by an all-ones Manchester-encoded signal.
10BASE-T Receive
On the receive side, input buffer and level detecting squelch circuits are employed. A differential input receiver circuit
and a PLL perform the decoding function. The Manchester-encoded data stream is separated into clock signal and
NRZ data. A squelch circuit rejects signals with levels less than 400mV or with short pulsewidths in order to prevent
noises at the RXP or RXM input from falsely triggering the decoder. When the input exceeds the squelch limit, the
PLL locks onto the incoming signal and the KSZ8895MQ/RQ/FMQ decodes a data frame. The receiver clock is
maintained active during idle periods in between data reception.
MDI/MDI-X Auto Crossover
To eliminate the need for crossover cables between similar devices, the KSZ8895MQ/RQ/FMQ supports HP Auto MDI/MDI-X
and IEEE 802.3u standard MDI/MDI-X auto crossover. HP Auto MDI/MDI-X is the default.
The auto-sense function detects remote transmit and receive pairs and correctly assigns transmit and receive pairs for the
KSZ8895MQ/RQ/FMQ device. This feature is extremely useful when end users are unaware of cable types, and also, saves on
an additional uplink configuration connection. The auto-crossover feature can be disabled through the port control registers, or
MIIM PHY registers. The IEEE 802.3u standard MDI and MDI-X definitions are:
March 12, 2014
27
Revision 1.7
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