參數(shù)資料
型號: KSZ8895MQ
廠商: Micrel Inc
文件頁數(shù): 56/119頁
文件大?。?/td> 0K
描述: IC ETHERNET SW 5PORT 128-PQFP
標準包裝: 66
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
配用: 576-3871-ND - BOARD EVALUATION FOR KSZ8895MQ
其它名稱: 576-3753
Micrel, Inc.
KSZ8895MQ/RQ/FMQ
SW5-RMII MAC to MAC Connection
(‘PHY mode’)
SW5-RMII MAC to PHY Connection
(‘MAC mode’)
External
MAC
KSZ8895RQ
SW5-RMII
KSZ8895RQ
SW Signal
Type
Description
External
PHY
KSZ8895RQ
SW5-RMII
KSZ8895RQ SW
Signal Type
REF_CLK
SMRXC
Output (clock
mode with
50MHz)
(Normal mode
without
connection)
Reference Clock
--------
SMTXC/SM
REFCLK
Input (clock comes
from SMRXC in
clock mode or
external clock in
normal mode)
CRS_DV
SMRXDV
/SMCRSDV
Output
Carier sense/Receive
data valid
CRS_DV
SMTXEN
Input
RXD[1:0]
SMRXD[1:0]
Output
Receive data bit [1:0]
RXD[1:0]
SMTXD[1:0]
Input
TX_EN
SMTXEN
Input
Transmit data enable
TX_EN
SMRXDV
/SMCRSDV
Output
TXD[1:0]
SMTXD[1:0]
Input
Transmit data bit
[1:0]
TXD[1:0]
SMRXD[1:0]
Output
(not used)
Receive error
(not used)
---
SMTXC/SM
REFCLK
Input (clock
comes from
SMRXC in clock
mode or external
clock in normal
mode)
Reference Clock
REF_CLK
SMRXC
Output (clock mode
with 50MHz)
(Normal mode
without connection)
Note:
1.
MAC/PHY mode in RMII is difference with MAC/PHY mode in MII, there is no strap pin and register configuration request in RMII, just follow
the signals connection in the table.
Table 5. Port 5 MAC5 SW5-RMII Connection
SNI Interface Operation
The serial network interface (SNI) is compatible with some controllers used for network layer protocol processing.
This interface can be directly connected to these types of devices. The signals are divided into two groups, one for
transmission and the other for reception. The signals involved are described in Table below.
SNI Signal
Description
KSZ8895MQ/RQ/FMQ Signal
TXEN
Transmit Enable
SMTXEN
TXD
Serial Transmit Data
SMTXD[0]
TXC
Transmit Clock
SMTXC
COL
Collision Detection
SCOL
CRS
Carrier Sense
SMRXDV
RXD
Serial Receive Data
SMRXD[0]
RXC
Receive Clock
SMRXC
Table 6. SNI Signals
This interface is a bit-wide data interface, so it runs at the network bit rate (not encoded). An additional signal on the
transmit side indicates when data is valid. Likewise, the receive side has an indicator that shows when the data is
valid.
For half-duplex operation there is a signal that indicates a collision has occurred during transmission.
March 12, 2014
41
Revision 1.7
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