參數(shù)資料
型號(hào): KSZ8993MLI
廠商: Micrel Inc
文件頁(yè)數(shù): 82/86頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH 10/100 3PORT 128-PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
產(chǎn)品目錄頁(yè)面: 1081 (CN2011-ZH PDF)
其它名稱: 576-3350
Micrel, Inc.
KSZ8993M/ML
October 2008
83
M9999-020606
Reset Timing
As long as the stable supply voltages to reset high timing (minimum of10ms) are met, there is no power
sequencing requirement for the KSZ8993M supply voltages (1.8V, 3.3).
It is recommended to wait 100sec after the de-assertion of reset before starting programming on the managed
interface.
The reset timing requirement is summarized in the following figure and table.
Figure 23. Reset Timing
Parameter
Description
Min
Max
Units
tsr
Stable supply voltages to reset high
10
ms
tcs
Configuration setup time
50
ns
tch
Configuration hold time
50
ns
trc
Reset to strap-in pin output
50
us
Table 26. Reset Timing Parameters
Reset Circuit Diagram
Micrel recommends the following discrete reset circuit as shown in Figure 24 when powering up the
KSZ8893M/ML/MI device. For the application where the reset circuit signal comes from another device (e.g.,
CPU, FPGA, etc), we recommend the reset circuit as shown in Figure 25.
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