Type(1) Port Pin Function 98 LED3-0 " />
參數(shù)資料
型號(hào): KSZ8995MI
廠商: Micrel Inc
文件頁數(shù): 5/76頁
文件大?。?/td> 0K
描述: IC SWITCH 5-PORT 10/100 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
其它名稱: 576-2127
KSZ8995MI-ND
June 2009
13
M9999-062309
KS8995M
Micrel, Inc.
Pin Number
Pin Name
Type(1)
Port
Pin Function
98
LED3-0
Ipu/O
3
LED indicator 0
99
GNDD
Gnd
Digital ground
100
VDDIO
P
3.3V digital V
DD for digital I/O
101
LED2-2
Ipu/O
2
LED indicator 2
102
LED2-1
Ipu/O
2
LED indicator 1
103
LED2-0
Ipu/O
2
LED indicator 0
104
LED1-2
Ipu/O
1
LED indicator 2
105
LED1-1
Ipu/O
1
LED indicator 1
106
LED1-0
Ipu/O
1
LED indicator 0
107
MDC
Ipu
All
Switch or PHY[5] MII management data clock
108
MDIO
I/O
All
Switch or PHY[5] MII management data I/O.
Features internal pull down to define pin state when not driven.
109
SPIQ
Otri
All
(1) SPI serial data output in SPI slave mode; (2) Not used in I2C master
mode. See
“pin# 113.”
110
SPIC/SCL
I/O
All
(1) Input clock up to 5MHz in SPI slave mode; (2) Output clock at
81KHz in I2C master mode. See
“pin# 113.”
111
SPID/SDA
I/O
All
(1) Serial data input in SPI slave mode; (2) Serial data input/output in
I2C master mode See
“pin# 113.”
112
SPIS_N
Ipu
All
Active low. (1) SPI data transfer start in SPI slave mode. When SPIS_N
is high, the KS8995M is deselected and SPIQ is held in high impedance
state, a high-to-low transition to initiate the SPI data transfer; (2) Not
used in I2C master mode.
113
PS1
Ipd
Serial bus configuration pin
If EEPROM is not present, the KS8995M will start itself with chip
default (00)...
Pin Config.
Serial Bus Configuration
PS[1:0]=00
I2C Master Mode for EEPROM
PS[1:0]=01
Reserved
PS[1:0]=10
SPI Slave Mode for CPU Interface
PS[1:0]=11
Factory Test Mode (BIST)
114
PS0
Ipd
Serial bus configuration pin. See
“pin# 113.”
115
RST_N
Ipu
Reset the KS8995M. Active low.
116
GNDD
Gnd
Digital ground
117
VDDC
P
1.8V digital core VDD
118
TESTEN
Ipd
NC for normal operation. Factory test pin.
Note:
1. P = Power supply
I = Input
O = Output
I/O = Bi-directional
Gnd = Ground
Ipu = Input w/ internal pull-up
Ipd = Input w/ internal pull-down
Ipd/O = Input w/ internal pull-down during reset, output pin otherwise
Ipu/O = Input w/ internal pull-up during reset, output pin otherwise
PU = Strap pin pull-up
PD = Strap pin pull-down
Otri = Output tristated
NC = No Connect
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