參數(shù)資料
型號(hào): KSZ8995XA
廠商: MICREL INC
元件分類(lèi): 網(wǎng)絡(luò)接口
英文描述: Integrated 5-Port 10/100 QoS Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PQFP128
封裝: LEAD FREE, PLASTIC, QFP-128
文件頁(yè)數(shù): 10/51頁(yè)
文件大小: 305K
代理商: KSZ8995XA
KS8995XA
Micrel, Inc.
M9999-051305
10
May 2005
Pin Number
63
Pin Name
PMRXD2
Type
(1)
Ipd/O
Port
5
Pin Function
(2)
PHY[5] MII receive bit 2. Strap option: PD (default) = disable back
pressure; PU = enable back pressure.
PHY[5] MII receive bit 1. Strap option: PD (default) = drop excessive
collision packets; PU = does not drop excessive collision packets.
PHY[5] MII receive bit 0. Strap option: PD (default) = disable
aggressive back-off algorithm in half-duplex mode; PU = enable for
performance enhancement.
PHY[5] MII receive error. Strap option: PD (default) = packet size
1518/1522 bytes; PU = 1536 bytes.
PHY[5] MII carrier sense/force duplex mode. See “Register 28.”
PHY[5] MII collision detect/force flow control. See “Register 18.”
Switch MII transmit enable.
Switch MII transmit bit 3.
Switch MII transmit bit 2.
Switch MII transmit bit 1.
Switch MII transmit bit 0.
Switch MII transmit error.
Switch MII transmit clock. PHY or MAC mode MII.
Digital ground.
3.3V digital V
DD
for digital I/O circuitry.
Switch MII receive clock. PHY or MAC mode MII.
Switch MII receive data valid.
Switch MII receive bit 3. Strap option: PD (default) = Disable Switch MII
full-duplex flow control; PU = Enable Switch MII full-duplex flow control.
Switch MII receive bit 2. Strap option: PD (default) = Switch MII in
full-duplex mode; PU = Switch MII in half-duplex mode.
Switch MII receive bit 1. Strap option: PD (default) = Switch MII in
100Mbps mode; PU = Switch MII in 10Mbps mode.
Switch MII receive bit 0; Strap option: see “Register 11[1].”
Switch MII collision detect.
Switch mode carrier sense.
64
PMRXD1
Ipd/O
5
65
PMRXD0
Ipd/O
5
66
PMRXER
Ipd/O
5
67
68
69
70
71
72
73
74
75
76
77
78
79
80
PCRS
PCOL
SMTXEN
SMTXD3
SMTXD2
SMTXD1
SMTXD0
SMTXER
SMTXC
GNDD
VDDIO
SMRXC
SMRXDV
SMRXD3
Ipd/O
Ipd/O
Ipd
Ipd
Ipd
Ipd
Ipd
Ipd
I/O
Gnd
P
I/O
Ipd/O
Ipd/O
5
5
81
SMRXD2
Ipd/O
82
SMRXD1
Ipd/O
83
84
85
SMRXD0
SCOL
SCRS
Ipd/O
Ipd/O
Ipd/O
Notes:
1. P = Power supply.
I = Input.
O = Output.
I/O = Bidirectional.
Gnd = Ground.
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
2. PU = Strap pin pull-up.
PD = Strap pull-down.
Otri = Output tristated.
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