參數(shù)資料
型號： KSZ9021GQI
廠商： Micrel Inc
文件頁數(shù)： 39/59頁
文件大?。?/td> 0K
描述： TXRX GIG ETH GMII/MII 128-PQFP
標(biāo)準(zhǔn)包裝： 66
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 8/8
規(guī)程： 千兆位以太網(wǎng)
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
其它名稱： 576-3790
Micrel, Inc.
KSZ9021GQ
September 2010
44
M9999-091010-1.2
Address
Name
Description
Mode
(1)
Default
31.9
Enable Jabber
1 = Enable jabber counter
0 = Disable jabber counter
RW
1
31.8:7
Reserved
RW
00
31.6
Speed status
1000Base-T
1 = Indicate chip final speed status at
1000Base-T
RO
0
31.5
Speed status
100Base-TX
1 = Indicate chip final speed status at
100Base-TX
RO
0
31.4
Speed status
10Base-T
1 = Indicate chip final speed status at
10Base-T
RO
0
31.3
Duplex status
Indicate chip duplex status
1 = Full-duplex
0 = Half-duplex
RO
0
31.2
1000Base-T
Mater/Slave
status
1 = Indicate 1000Base-T Master mode
0 = Indicate 1000Base-T Slave mode
RO
0
31.1
Software
Reset
1 = Reset chip, except all registers
0 = Disable reset
RW
0
31.0
Link Status
Check Fail
1 = Fail
0 = Not Failing
RO
0
Note:
1.
RW = Read/Write.
RC = Read-cleared
RO = Read only.
SC = Self-cleared.
LH = Latch high.
Extended Registers
Address
Name
Description
Mode
(1)
Default
Register 257 (101h) – Strap Status
257.15:6
Reserved
RO
257.5
CLK125_EN
status
1 = CLK125_EN strap-in is enabled
0 = CLK125_EN strap-in is disabled
RO
257.4:0
PHYAD[4:0]
status
Strapped-in value for PHY Address
RO
Register 258 (102h) – Operation Mode Strap Override
258.15:8
Reserved
RW
258.7
Tri-state all
digital I/Os
1 = Tri-state all digital I/Os for further power
saving during software power down
RW
0
258.6:5
Reserved
RW
258.4
NAND Tree
override
1 = Override strap-in for NAND Tree mode
RW
258.3:2
Reserved
RW
258.1
GMII / MII
override
1 = Override strap-in for GMII / MII mode
RW
258.0
Reserved
RW
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