參數(shù)資料
型號(hào): L64724QC
廠商: LSI CORP
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 15/32頁(yè)
文件大?。?/td> 338K
代理商: L64724QC
22
L64724 Satellite Receiver
Table 7 L64724 AC Timing Parameters with Microcontroller Enabled
Parameter
Description
Register
Groups
90 MHz
Units
Min
Max
1
tCYCLE
Clock Cycle for PCLK and CLK
11.1
ns
2
tPWH
Clock Pulse Width HIGH
TBD
ns
3
tPWL
Clock Pulse Width LOW
TBD
ns
4
tS
Input Setup Time to CLK
TBD
ns
5
tH
Input Hold to CLK
TBD
ns
6
tOD
Output Delay from CLK
TBD
ns
7
tRWH
Reset Pulse Width HIGH
3
CLK cycles
8
tWK
Wake-Up Time
280
CLK cycles
9
TDLY
Delay from COE
15.0
ns
10
tSURCS
READ/WRITE Setup before CS
LOW
0.0
ns
11
tSUA
A[2:0] Setup before AS LOW
15.0
ns
12
tHLDA
A[2:0] Hold after AS LOW
Groups 0–4 0.0
ns
13
tDCSDTL
Data Valid to DTACK/WAIT LOW
Groups 0–4 –
7 ns +
1 cycle
ns
CLK cycles
14
tHLDD
Write Data Hold after CS HIGH
0.0
ns
15
tCYCLE_CS
Minimum CS Width
Groups 0–4 31
CLK cycles
16
tHLDRCS
READ/WRITE Hold after CS HIGH
0.0
ns
17
tWRREC
Write Recovery Time
Groups 0–4 5
CLK Cycles
18
tDCSDTH
CS HIGH to DTACK/WAIT HIGH
Groups 0–4 –
28.0
ns
(Sheet 1 of 2)
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