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參數(shù)資料
| 型號： | L64733C-48 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | TQFP-48 |
| 文件頁數(shù)： | 13/52頁 |
| 文件大?。?/td> | 552K |
| 代理商： | L64733C-48 |
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20
L64733C/L64734 Tuner and Satellite Receiver Chipset
FSTARTOUT
Frame Start Output
Output
The L64734 asserts the FSTARTOUT signal during the
rst bit of every frame with valid data in Serial Channel
Output mode and during the rst byte in Parallel Channel
Output mode. FSTARTOUT is valid only when the
DVALIDOUT signal is asserted. The FSTARTOUT signal
is deasserted after the FEC_RST register bit is set.
Microcontroller Interface
The Microcontroller Interface connects the L64734 to an external
microcontroller.
INTn
Interrupt
Output
The L64734 asserts INTn when an internal unmasked
interrupt ag is set. The INTn signal remains asserted
during the interrupt condition, and the interrupt ag is not
masked.
SADR[1:0]
Serial Address
Input
The SADR[1:0] signals are the two programmable bits of
the serial address for the L64734.
SCLK
Serial Clock
Bidirectional
SCLK is the serial clock pin for a two-wire serial protocol.
SDATA
Serial Data
Bidirectional
SDATA is the serial data pin for a two-wire serial protocol.
Synthesizer Control Interface
The Synthesizer Control Interface allows the L64734 to control the
L64733C frequency synthesizer.
FDOUB
Frequency Doubler
Output, 3-State
Bit 6 of register Group 4, APR 79 controls the L64734
FDOUB output pin, which enables or disables the
frequency doubler on the L64733C.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L64734 | 制造商:LSI 制造商全稱:LSI 功能描述:Tuner and Satellite Receiver Chipset |
| L64734C-45 | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| L64735GM-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-27 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
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