參數(shù)資料
型號: L6566ATR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: 0.8 A POWER FACTOR CONTROLLER WITH POST REGULATOR, 300 kHz SWITCHING FREQ-MAX, PDSO16
封裝: LEAD FREE, SOP-16
文件頁數(shù): 17/51頁
文件大小: 646K
代理商: L6566ATR
Application information
L6566A
24/51
5.3
Burst-mode operation at no load or very light load
When the voltage at the COMP pin (9) falls 20 mV below a threshold fixed internally at a
value, VCOMPBM, depending on the selected operating mode, the L6566A is disabled with
the MOSFET kept in OFF state and its consumption reduced at a lower value to minimize
Vcc capacitor discharge.
The control voltage now will increase as a result of the feedback reaction to the energy
delivery stop (the output voltage will be slowly decaying), the threshold will be exceeded and
the device will restart switching again. In this way the converter will work in burst-mode with
a nearly constant peak current defined by the internal disable level. A load decrease will
then cause a frequency reduction, which can go down even to few hundred hertz, thus
minimizing all frequency-related losses and making it easier to comply with energy saving
regulations. This kind of operation, shown in the timing diagrams of Figure 11 along with the
others previously described, is noise-free since the peak current is low.
If it is necessary to decrease the intervention threshold of the burst-mode operation, this can
be done by adding a small DC offset on the current sense pin as shown in Figure 12 on
.
Note:
The offset reduces the available dynamics of the current signal; thereby, the value of the
sense resistor must be determined taking this offset into account.
Figure 11.
Load-dependent operating modes: timing diagrams
GD
(pin 4)
VCOMPBM
t
COMP
(pin 9)
20 mV
hyster.
QR Mode
Valley-skipping Mode
Burst-mode
fsw
fosc
QR Mode
FF Mode
Burst-mode
FF Mode
MODE/SC=Open
MODE/SC=VREF
MODE/SC=Open
MODE/SC=VREF
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