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參數(shù)資料
| 型號： | L8575 |
| 英文描述： | Dual-Resistive,Low-Cost Subscriber Line Interface Circuit(SLIC) |
| 中文描述： | 雙電阻，低成本用戶線接口電路（SLIC） |
| 文件頁數(shù)： | 7/36頁 |
| 文件大?。?/td> | 633K |
| 代理商： | L8575 |
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Lucent Technologies Inc.
7
Advance Data Sheet
March 1997
L8575
Dual-Resistive, Low-Cost SLIC
Preliminary Pin Information
(continued)
Table 1. Pin Descriptions
(continued)
Pin
31
Symbol
RGBNA
Type
I
Name/Function
Battery Noise Gain Resistor (Channel A).
the current flowing into RGBNA. Connect a resistor from RGBNA to AGND to set the
gain of the channel A battery noise cancellation circuit.
Ring Sense (Channel A).
Positive input of channel A transmit op amp. Connect one
high-value resistor between RSA and the Ring of loop A and another high-value resis-
tor between RSA and AGND.
Tip Sense (Channel A).
Negative input of channel A transmit op amp. Connect one
high-value resistor between TSA and the Tip of loop A and another high-value resistor
between TSA and XMTA.
Transmit Signal Output (Channel A).
Channel A transmit amplifier output.
Ring-Trip Negative (Channel A).
Negative sense input for the ring-trip detector.
Ring-Trip Positive (Channel A).
Positive sense input for the ring-trip detector.
Test Relay Driver (Channel A).
This output drives an external test relay.
Ringing Relay Driver (Channel A).
This output drives the external ringing relay.
Disconnect Relay Driver (Channel A).
This output drives an external relay.
Digital Ground.
Ground for channel A relay drivers.
5 V Digital dc Supply.
5 V supply for logic and relay driver flyback diodes.
Fault Filter (Channel A).
Connect a 0.1
μ
F capacitor from CFLTA to AGND. This
capacitor filters Tip/Ring transients from the channel A fault detector.
Enable.
A high-to-low transition on this logic input latches the data in the 8-bit serial
shift register into the output latches. The logic level of EN also controls which data is
shifted into the 8-bit serial shift register (refer to CLK pin description).
Clock.
When the enable input (EN) is high, a low-to-high transition on this logic input
shifts data at the data input pin (DI) into the 8-bit serial shift register. When the enable
input (EN) is low, a low-to-high transition latches the states of the internal detectors into
the 8-bit serial shift register.
The current flowing out of PRA is 50 times
32
RSA
I
33
TSA
I
34
35
36
37
38
39
40
41
42
XMTA
RTNA
RTPA
RDTA
RDRA
RDDA
DGND
V
DDD
CFLTA
O
I
I
O
O
O
—
—
I/O
43
EN
I
44
CLK
I
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