參數(shù)資料
型號: L9942
廠商: STMICROELECTRONICS
元件分類: 運動控制電子
英文描述: STEPPER MOTOR CONTROLLER, PDSO36
封裝: POWER, SO-36
文件頁數(shù): 3/21頁
文件大?。?/td> 161K
代理商: L9942
MICROCONTROLLER SECTION
Battery voltage VS is applied to the contact monitor pin Cn by the sense signal from strobe generator.
The contact current is monitored by the current comparator. If the current is below the threshold level
ICMTH a logic zero is generated, if the current is above ICMTH a logic one is generated and sampled in
contact sample register CSR with the strobe signal. The content of CSR is permanently compared with
the content of contact monitor compare register CMCR.
The purpose of this register is to store the last contact status (written by software). Whenever a contact
changes from its previous state a mismatch between CSR and CMCR will occur and an interrupt is gen-
erated. The controller has to read the contact status now. As CMSR is valid for 30
s during sensing only
(and this is completely asynchronous to CPU operation) the controller can sense the contact perma-
nently by setting contact monitor biasing register CMBR. If a bit is set the corresponding contact is
sensed permanently and can be read by the CPU via CMSR independently from the dynamic sensing
mechanism. When the CPU has determined the contact which changed its state the corresponding bit in
CMCR has to be changed in order to clear the interrupt request.
The interrupt lines from all channels are ored and can set the interrupt flag IF in contact monitor interrupt
register CMIR. This flag can be masked with enable bit EN.
When all bits in CMCR and CSR match the interrupt signal INT is cleared and the flag IF can be reset
under software control. As long as at least one channel interrupt INTn is active the interrupt flag IF can-
not be cleared as the set function is dominant.
This guarantees that no contact state change can be lost. The interrupt output of the contact monitor is
connected to level sensitive interrupt input #3 of the CPU. Therefore the interrupt has to be cleared be-
fore the interrupt service routine is left.
The CPU controls the operation of the 7 contact monitors, using 4 registers.
- Status register : read only (one for each channel)
MSB
LSB
bit7
CS6
CS5
CS4
CS3
CS2
CS1
CS0
CMSR
bit7 is always read as zero
CMSR holds the status of those contacts which are determined in CMBR to be
sensed permanently. The other bits are not valid and may change randomly.
Set means contact is closed, Reset means contact is open.
- Interrupt register : 2 bits)
EN
IF
n.i.
CMIR
bit7 is always read as zero
this register is cleared by reset.
EN: Interrupt enable bit: set/reset by the CPU, enables or disables the Contact Monitor Interrupt.
IF: read/write interrupt flag, set if one status bit changes, reset by CPU only
- Biasing register: 7 bit register (one for each channel) set/reset by CPU, enables permanent contact
biasing. Set means contact is permanently biased.
bit7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CMBR
bit7 is always read as zero
this register is cleared by reset.
- Compare register: 7 bit register (one for each channel) set/reset by CPU. This register is permanently
compared with CSR (strobed contacts)
bit7
CC6
CC5
CC4
CC3
CC2
CC1
CC0
CMCR
bit7 is always read as zero
this register is cleared by reset.
Oscillators
The L9942 has two oscillators to provide appropriate clock signals in RUN and STOP mode (see Fig. 6).
L9942
11/21
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