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參數(shù)資料
| 型號： | LAN91C100 |
| 廠商： | SMSC Corporation |
| 英文描述： | FEAST⑩ Fast Ethernet Controller |
| 中文描述： | 宴⑩快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 23/101頁 |
| 文件大?。?/td> | 312K |
| 代理商： | LAN91C100 |
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23
I/O SPACE - BANK0
OFFSET
0
NAME
TRANSMIT CONTROL REGISTER
TYPE
READ/WRITE
SYMBOL
TCR
This register holds bits programmed by the CPU to control some of the protocol transmit options.
HIGH
BYTE
EPH
LOOP
STP
SQET
FDUPLX
MON_
CSN
NOCRC
X
X
0
0
0
0
X
0
LOW
BYTE
PAD_EN
FORCOL
LOOP
TXENA
0
X
X
X
X
0
0
0
EPH_LOOP Internal loopback at the EPH
block. Serial data is looped back when set.
Defaults low. When EPH_LOOP is high, the
following transmit outputs are forced inactive:
TXD0-3=0h, TXEN100=TXEN=0, TXD=1. The
following
external
inputs
CRS=CRS100=0,
RX_DV=RX_ER=0.
are
blocked:
COL=COL100=0,
STP_SQET Stop transmission on SQET error.
If set, stops and disables transmitter on SQE
test error. Does not stop on SQET error and
transmits next frame if clear. Defaults low.
FDUPLX When set it enables full duplex
operation. This will cause frames to be received
if they pass the address filter regardless of the
source for the frame. When clear the node will
not receive a frame sourced by itself.
MON_CSN When set, the LAN91C100
monitors carrier while transmitting. It must see
its own carrier by the end of the preamble. If it
is not seen, or if carrier is lost during
transmission, the transmitter aborts the frame
without CRC and turns itself off. When this bit
is clear the transmitter ignores its own carrier.
Defaults low.
NOCRC Does not append CRC to transmitted
frames when set; allows software to insert the
desired CRC. Defaults to 0 (CRC inserted).
PAD_EN When set, the LAN91C100 will pad
transmit frames shorter than 64 bytes with 00.
Does not pad frames when reset.
FORCOL When set, the transmitter will force a
collision by not deferring deliberately. After the
collision this bit is reset automatically. This bit
defaults low to normal operation.
LOOP Loopback. General purpose output port
used to control the LBK pin. Typically used to
put the PHY chip in loopback mode.
TXENA Transmit enabled when set. Transmit
is disabled if clear. When the bit is cleared, the
LAN91C100
will
complete
transmission before stopping. When stopping
due to an error, this bit is automatically cleared.
the
current
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PDF描述 |
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| LAN91C110 | FEAST FAST ETHERNET CONTROLLER FOR PCMCIA AND GENERIC 16-BIT APPLICATIONS |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LAN91C100FD | 制造商:- 功能描述: 制造商:SMSC 功能描述: |
| LAN91C100-FD | 制造商:SMSC 制造商全稱:SMSC 功能描述:FEAST Fast Ethernet Controller with Full Duplex Capability |
| LAN91C100FD(208PQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| LAN91C100FD(208TQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| LAN91C100FD_06 | 制造商:SMSC 制造商全稱:SMSC 功能描述:FEAST Fast Ethernet Controller with Full Duplex Capability |
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