參數(shù)資料
型號(hào): LC5256MC-4F256C
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
中文描述: EE PLD, 4.8 ns, PBGA256
封裝: FPBGA-256
文件頁數(shù): 40/92頁
文件大?。?/td> 378K
代理商: LC5256MC-4F256C
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
40
ispXPLD 5000MX Family Timing Adders
Parameter
Description
Base
Param.
-4
-45
-5
-52
-75
Units
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
t
IOI
Input Adjusters
LVTTL_in
Using 3.3V TTL
Using 1.8V
CMOS
Using 2.5V
CMOS
Using 3.3V
CMOS
Using AGP 1x
Using CTT 2.5V
Using CTT 3.3V
Using GTL+
Using HSTL 2.5V,
Class I
Using HSTL 2.5V,
Class III
Using HSTL 2.5V,
Class IV
Using Low Volt-
age Differential
Signaling (LVDS)
Using Low
Voltage PECL
Using PCI
Using SSTL 2.5V,
Class I
Using SSTL 2.5V,
Class II
Using SSTL 3.3V,
Class I
Using SSTL 3.3V,
Class II
t
IOIN
0.0
0.0
0.0
0.0
0.0
ns
LVCMOS_18_in
t
IOIN
0.0
0.0
0.0
0.0
0.0
ns
LVCMOS_25_in
t
IOIN
0.0
0.0
0.0
0.0
0.0
ns
LVCMOS_33_in
t
IOIN
0.0
0.0
0.0
0.0
0.0
ns
AGP_1X_in
CTT25_in
CTT33_in
GTL+_in
t
IOIN
t
IOIN
t
IOIN
t
IOIN
1.0
1.0
1.0
0.5
1.0
1.0
1.0
0.5
1.0
1.0
1.0
0.5
1.0
1.0
1.0
0.5
1.0
1.0
1.0
0.5
ns
ns
ns
ns
HSTL_I_in
t
IOIN
0.5
0.5
0.5
0.5
0.5
ns
HSTL_III_in
t
IOIN
0.6
0.6
0.6
0.6
0.6
ns
HSTL_IV_in
t
IOIN
0.6
0.6
0.6
0.6
0.6
ns
LVDS_in
t
IOIN
0.5
0.5
0.5
0.5
0.5
ns
LVPECL_in
t
IOIN
0.5
0.5
0.5
0.5
0.5
ns
PCI_in
t
IOIN
1.0
1.0
1.0
1.0
1.0
ns
SSTL2_I_in
t
IOIN
0.5
0.5
0.5
0.5
0.5
ns
SSTL2_II_in
t
IOIN
0.5
0.5
0.5
0.5
0.5
ns
SSTL3_I_in
t
IOIN
0.6
0.6
0.6
0.6
0.6
ns
SSTL3_II_in
t
IOIN
0.6
0.6
0.6
0.6
0.6
ns
t
IOO
Output Adjusters – Output Signal Modi
fi
ers
Slow Slew
Using Slow Slew
(LVTTL and
LVCMOS
Outputs Only)
t
IOBUF,
t
IOEN
0.9
0.9
0.9
0.9
0.9
ns
t
IOO
Output Adjusters – Output Con
fi
gurations
LVTTL_out
Using 3.3V TTL
Drive
t
IOBUF,
t
IOEN
,
t
IODIS
t
IOBUF,
t
IOEN
,
t
IODIS
t
IOBUF,
t
IOEN
,
t
IODIS
1.2
1.2
1.2
1.2
1.2
ns
LVCMOS_18_4mA_out
Using 1.8V
CMOS Standard,
4mA Drive
Using 1.8V
CMOS Standard,
5.33mA Drive
0.3
0.3
0.3
0.3
0.3
ns
LVCMOS_18_5.33mA_out
0.3
0.3
0.3
0.3
0.3
ns
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