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參數(shù)資料
| 型號： | LC5256MC |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| 中文描述： | 3.3，2.5V和1.8V在系統(tǒng)可編程擴(kuò)展可編程邏輯器件XPLD⑩家庭 |
| 文件頁數(shù)： | 18/92頁 |
| 文件大?。?/td> | 378K |
| 代理商： | LC5256MC |
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Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
18
Figure 17. I/O Cell
Table 10. Shared PTOE Segments
sysIO Standards
Each I/O within a bank is individually con
fi
gurable based on the V
CCO
and V
REF
settings. Some standards also
require the use of an external termination voltage. Table 12 lists the sysIO standards with the typical values for
V
CCO,
V
REF
and V
TT.
For more information on the sysIO capability, please refer to Lattice technical note number
TN1000,
sysIO Usage Guidelines for Lattice Devices,
available at www.latticesemi.com.
Table 11. Number of I/Os per Bank
Device
MFBs Associated With Segments
(A, B, C, D) (E, F, G, H)
(A, B, C, D) (E, F, G, H)
(I, J, K, L) (M, N, O, P)
(A, B, C, D) (E, F, G, H)
(I, J, K, L) (M, N, O, P)
(Q, R, S, T) (U, V, W, Z)
(A, B, C, D) (E, F, G, H)
(I, J, K, L) (M, N, O, P)
(Q, R, S, T) (U, V, W, Z)
(Y, Z, AA, AB) (AC, AD, AE, AF)
ispXPLD 5256MX
ispXPLD 5512MX
ispXPLD 5768MX
ispXPLD 51024MX
Device
Maximum Number of I/Os per Bank (n)
36
68
96
96
ispXPLD 5256MX
ispXPLD 5512MX
ispXPLD 5768MX
ispXPLD 51024MX
Shared PTOE 0
Shared PTOE 1
Shared PTOE 2
Shared PTOE 3
PTOE
GOE0
GOE1
TOE
V
to All
Other I/Os
in Bank
V
for
this Bank
Differential
I/O Buffer
To Primary
Macrocell
To Alternate
Macrocell
Delay Element
To Adjacent
I/O Pad
V
Dependent
Input Buff
V
to All
other I/Os in Bank
er
CMOS/TTL
Input Buffer
(V
REF
Independent)
I/O
Pad
GND
Data Output from
Primary Macrocell
Data Output from
Alternate Macrocells
Output Sharing
Array (OSA)
Data Input to Routing
To Adjacent I/O Pad
Differential
Output Buffer
Output Buffer
(V
CCO
Independent
for Open Drain
Outputs)
+
–
+
–
相關(guān)PDF資料 |
PDF描述 |
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| LC5256MC-4F256C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-5F256C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-75F256C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5512MC-45F256C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5512MC-45F484C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC5256MC-45F208C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-45F208I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-45F256C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-45F256I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-45F484C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
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