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參數(shù)資料

型號：	LC5256MC
廠商：	Lattice Semiconductor Corporation
英文描述：	3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
中文描述：	3.3，2.5V和1.8V在系統(tǒng)可編程擴展可編程邏輯器件XPLD⑩家庭
文件頁數(shù)：	32/92頁
文件大小：	378K
代理商：	LC5256MC

Lattice Semiconductor

ispXPLD 5000MX Family Data Sheet

32

ispXPLD 5000MX Family Internal Switching Characteristics

Over Recommended Operating Conditions

Parameter

In/Out Delays

t

IN

Description

Base

Parameter

-4

-45

-5

-52

-75

Units

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Input Buffer Delay

Global Clock Input

Buffer Delay

Global RESET Pin

Delay

Global OE Pin

Delay

Delay through

Output Buffer

Output Enable Time

Output Disable

Time

—

—

0.70

—

0.91

—

0.96

—

1.11

—

1.30

ns

t

GCLK_IN

—

—

0.40

—

0.35

—

0.35

—

0.35

—

0.55

ns

t

RST

—

—

3.77

—

4.24

—

4.71

—

4.71

—

7.07

ns

t

GOE

—

—

1.98

—

2.66

—

2.34

—

2.87

—

3.27

ns

t

BUF

—

—

1.16

—

1.30

—

1.45

—

1.60

—

2.17

ns

t

EN

—

—

2.52

—

2.84

—

3.16

—

3.63

—

4.23

ns

t

DIS

—

—

1.92

—

2.40

—

2.40

—

2.40

—

3.60

ns

Routing Delays

t

ROUTE

Delay through SRP

Input Buffer to

Macrocell Register

Delay

Product Term

Sharing Array Delay

Internal Feedback

Delay

Global Clock Tree

Delay

Block PT Clock

Delay

Macrocell PT Clock

Delay

Programmable PLL

Delay Increment

Block PT Reset

Delay

Macrocell PT Set/

Reset Delay

Macrocell PT OE

Delay

Segment PT OE

Delay

Output Sharing

Array Delay

Global PT OE Delay

5-PT Bypass

Propagation Delay

Macrocell

Propagation Delay

—

—

1.95

—

2.06

—

2.34

—

2.24

—

3.66

ns

t

INREG

—

—

0.60

—

0.60

—

0.60

—

0.47

—

1.63

ns

t

PTSA

—

—

0.50

—

0.50

—

0.53

—

0.83

—

1.34

ns

t

FBK

—

—

0.19

—

0.02

—

0.39

—

0.03

—

0.60

ns

t

GCLK

—

—

0.52

—

0.32

—

0.72

—

0.82

—

0.78

ns

t

BCLK

—

—

0.12

—

0.14

—

0.15

—

0.15

—

0.23

ns

t

PTCLK

—

—

0.12

—

0.14

—

0.15

—

0.15

—

0.23

ns

t

PLL_DELAY

—

—

0.30

—

0.30

—

0.30

—

0.30

—

0.30

ns

t

BSR

—

—

0.72

—

0.81

—

0.90

—

0.94

—

1.35

ns

t

PTSR

—

—

0.60

—

0.75

—

0.75

—

0.75

—

1.13

ns

t

LPTOE

—

—

0.83

—

1.19

—

1.04

—

1.52

—

1.31

ns

t

SPTOE

—

—

0.83

—

1.19

—

1.04

—

1.52

—

1.31

ns

t

OSA

—

—

0.80

—

0.90

—

1.00

—

1.00

—

1.50

ns

t

PTOE

—

—

0.83

—

1.04

—

1.04

—

1.04

—

1.56

ns

t

PDB

—

—

0.20

—

0.23

—

0.25

—

0.25

—

0.38

ns

t

PDI

—

—

0.50

—

0.93

—

0.72

—

0.72

—

1.04

ns

相關(guān)PDF資料	PDF描述
LC5256MC-4F256C	3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MC-5F256C	3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MC-75F256C	3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5512MC-45F256C	3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5512MC-45F484C	3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
LC5256MC-45F208C	制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MC-45F208I	制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MC-45F256C	制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MC-45F256I	制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
LC5256MC-45F484C	制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family

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