參數(shù)資料
型號(hào): LC5256MC
廠商: Lattice Semiconductor Corporation
英文描述: 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
中文描述: 3.3,2.5V和1.8V在系統(tǒng)可編程擴(kuò)展可編程邏輯器件XPLD⑩家庭
文件頁數(shù): 28/92頁
文件大?。?/td> 378K
代理商: LC5256MC
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
28
sysIO Differential DC Electrical Characteristics
Over Recommended Operating Conditions
Figure 19. LVPECL Driver with Three Resistor Pack
Parameter
LVDS
V
INP
V
THD
I
IN
V
OH
V
OL
V
OD
V
OD
V
OS
V
OS
I
OSD
Description
Test Conditions
Min.
Typ.
Max.
Input Voltage
Differential Input Threshold
Input Current
Output High Voltage for V
OP
or V
OM
Output Low Voltage for V
OP
or V
OM
Output Voltage Differential
Change in V
OD
Between High and Low
Output Voltage Offset
Change in V
OS
Between H and L
Output Short Circuit Current
0V
2.4V
+/-10uA
1.60V
450mV
50mV
1.375V
50mV
0.2
V
CM
1.8V
Power On
RT = 100 Ohm
RT = 100 Ohm
(V
OP
- V
OM
), R
T
= 100 Ohm
+/-100mV
0.9V
250mV
1.125V
1.38V
1.03V
350mV
1.20V
(V
OP
- V
OM
)/2, R
T
= 100 Ohm
V
OD
= 0V Driver outputs
shorted
24mA
LVPECL
1
DC
Parameter
V
CCO
V
IH
V
IL
V
OH
V
OL
V
DIFF
1. These values are valid at the output of the source termination pack as shown above with 100-ohm differential load only (see Figure 19).
The V
OH
levels are 200mV below the standard LVPECL levels and are compatible with devices tolerant of the lower common mode ranges.
2. Valid for 0.2
V
CM
1.8V
Parameter Description
Min.
Max.
Min.
Max.
Min.
Max.
Units
V
V
V
V
V
V
3.0
3.3
3.6
Input Voltage High
Input Voltage Low
Output Voltage High
Output Voltage Low
Differential Input voltage
1.49
0.86
1.7
0.96
0.3
2.72
2.125
2.11
1.27
1.49
0.86
1.92
1.06
0.3
2.72
2.125
2.28
1.43
1.49
0.86
2.03
1.3
0.3
2.72
2.125
2.41
1.57
2
Zo
Zo
Rs
R
D
A
Rs
to LVPECL
differential
receiver
1/4 of Bourns P/N
CAT 16-PC4F12
ispXPGA
LVPECL Buffer
R
T
=
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