參數(shù)資料
型號: LC5512MC-75F484I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 72/99頁
文件大?。?/td> 0K
描述: IC XPLD 512MC 7.5NS 484FPBGA
標準包裝: 60
系列: ispXPLD® 5000MC
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 1.65 V ~ 1.95 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 253
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
70
2
46N
G6
H19
-
G7
AB19
2
47P
G8
H20
-
G9
AA19
-
VCCO2
-
VCCO2
2
47N
G10
H21
-
G11
U17
-
GND (Bank 2)
-
GND (Bank 2) GND (Bank 2)
2
48P
G12
H22
-
G13
V18
2
48N
G14
H23
-
G15
AB21
2
49P
G16
H24
-
G17
U18
2
49N
G18
H25
-
G19
T17
2
50P
G20
H26
-
G21
R16
AB20
2
50N
G22
H27
-
G23
P16
AA20
2
51P
G24
H28
-
G25
N15
Y19
-
VCCO2
-
VCCO2
2
51N
G26
H29
-
G27
N14
V19
-
GND (Bank 2)
-
GND (Bank 2) GND (Bank 2)
2
52P
G28
F16
H16
G29
N16
T18
2
52N
G30
F17
H17
G31
M16
R17
2
53P
H0
F18
H18
H1
M14
U19
2
53N
H2
F19
H19
H3
M15
T19
2
54P
H4
H30
E24
H5
V20
-
VCC
-
VCC
2
54N
H6
H31
E26
H7
U20
2
55P
H8
F20
H20
H9
L13
W20
2
55N
H10
F21
H21
H11
L12
Y21
2
56P
H12
F22
H22
H13
L15
R18
2
56N
H14
F23
H23
H15
L16
R19
-
GND
-
GND
2
57P
H16
F24
H24
H17
L14
W21
-
VCCO2
-
VCCO2
2
57N
H18
F25
H25
H19
K15
Y22
-
GND (Bank 2)
-
GND (Bank 2) GND (Bank 2)
2
58P
H20
F26
H26
H21
K14
R20
2
58N
H22
F27
H27
H23
K12
P20
2
59P
H24
F28
H28
H25
K13
T21
2
59N
H26
F29
H29
H27
J13
R21
2
60P
H28
F30
H30
H29
J14
U21
2
60N
H30
F31
H31
J12
V21
-
TOE
---
J15
W22
-
RESET
-
J11
V22
-
GOE0
---
H11
T22
-
GOE1
---
H13
R22
-
GNDP
-
See Power Supply and
NC Connections Table
ispXPLD 5768MX Logic Signal Connections (Continued)
sysIO Bank LVDS Pair
Primary Macrocell/
Function
Alternate Outputs
Alternate
Inputs
256 fpBGA
Ball Number
484 fpBGA
Ball Number
Macrocell 1
Macrocell 2
SELECT
DEVICES
DISCONTINUED
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