參數(shù)資料
型號(hào): LC5512MC-75F484I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 88/99頁
文件大小: 0K
描述: IC XPLD 512MC 7.5NS 484FPBGA
標(biāo)準(zhǔn)包裝: 60
系列: ispXPLD® 5000MC
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 1.65 V ~ 1.95 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 253
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
85
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
3
110N
U4
X25
V25
U5
H21
J21
-
VCCO3
-
VCCO3
3
110P
U6
X24
V24
U7
G21
H21
-
GND
-
GND
3
111N
U8
X23
V23
U9
D22
G25
3
111P
U10
X22
V22
U11
D21
G24
3
112N
U12
X21
V21
U13
J20
G23
3
112P
U14/CLK_OUT1
X20
V20
U15
J19
G22
3
113N
U16
V31
-
U17
E20
J20
-
VCC
-
VCC
3
113P
U18
V30
U30
U19
F20
H20
3
114N
U20
V29
U28
U21
H17
G26
3
114P
U22
V28
U26
U23
H18
F25
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
3
115N
U24
V27
-
U25
J18
F24
-
VCCO3
-
VCCO3
3
115P
U26
V26
-
U27
H19
F23
3
116N
U28
V25
-
U29
G20
G21
3
116P
U30
V24
-
U31
G19
F22
-
GND
-
GND
3
117N
V0
V23
-
V1
C22
F26
-
VCC
-
VCC
3
117P
V2
V22
-
V3
C21
E26
3
118N
V4
V21
-
V5
D20
E25
3
118P
V6
V20
-
V7
C19
E24
3
119N
V8
V19
-
V9
F19
E23
3
119P
V10
V18
-
V11
E19
E22
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
3
120N
V12
V17
-
V13
G18
D26
-
VCCO3
-
VCCO3
3
120P
V14
V16
-
V15
F18
D25
3
121N
V16
V15
-
V17
B20
D24
3
121P
V18
V14
-
V19
B19
D23
3
122N
V20
V13
-
V21
A20
C26
3
122P
V22
V12
-
V23
A19
C25
3
123N
V24
X19
V19
V25
D18
G19
3
123P
V26
X18
V18
V27
C18
F19
3
124N
V28
X17
V17
V29
G17
G18
3
124P
V30
X16
V16
V31
F16
F18
3
125N
W0
X31
V31
W1
E17
F20
3
125P
W2
X30
V30
W3
D17
E20
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
ispXPLD 51024MX Logic Signal Connections (Continued)
sysIO
Bank
LVDS Pair
Primary
Macrocell/Function
Alternate Outputs
Alternate
Input
484 fpBGA
Ball Number
672 fpBGA
Ball Number
Macrocell 1
Macrocell 2
SELECT
DEVICES
DISCONTINUED
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