參數(shù)資料
型號(hào)： LC5768MC-5F484C
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family
中文描述： EE PLD, 6 ns, PBGA484
封裝： FPBGA-484
文件頁(yè)數(shù)： 48/92頁(yè)
文件大?。?/td> 378K
代理商： LC5768MC-5F484C
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
48
Switching Test Conditions
Figure 21 shows the output test load that is used for AC testing. The speci
fi
c values for resistance, capacitance,
voltage, and other test conditions are shown in Table 14.
Figure 21. Output Test Load, LVTTL and LVCMOS Standards
Table 14. Test Fixture Required Components
Test Condition
R
1
106
R
2
106
C
L
35pF
Timing Ref.
V
CCO
/2
LVCMOS3.3 = 1.5V
LVCMOS2.5 = V
CCO
/2
LVCMOS1.8 = V
CCO
/2
V
CCO
/2
V
CCO
/2
V
OH
- 0.15
V
OL
+ 0.15
V
CCO
1.8V
Default LVCMOS 1.8 I/O (L -> H, H -> L)
LVCMOS I/O (L -> H, H -> L)
—
—
35pF
LVCMOS3.3 = 3.0V
LVCMOS2.5 = 2.3V
LVCMOS1.8 = 1.65V
1.65V
1.65V
1.65V
1.65V
Default LVCMOS 1.8 I/O (Z -> H)
Default LVCMOS 1.8 I/O (Z -> L)
Default LVCMOS 1.8 I/O (H -> Z)
Default LVCMOS 1.8 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
—
106
—
106
106
—
106
—
35pF
35pF
5pF
5pF
V
CCO
R1
R2
CL*
Device
Output
*C
L
includes test fixture and probe capacitance.
Test
Point
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